Rf Cmos Power Amplifier - (Ebook) Kluwer Inter(Hella & Ismall).pdf - Electrical and Electronical - hosenfan

RF CMOS Power Amplifiers:

Theory, Design and Implementation

THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND

COMPUTER SCIENCE

ANALOG CIRCUITS AND SIGNAL PROCESSING

Consulting Editor: Mohammed Ismail. Ohio State University

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POWER TRADE-OFFS AND LOW POWER IN ANALOG CMOS ICS

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RF CMOS POWER AMPLIFIERS: THEORY, DESIGN AND IMPLEMENTATION

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WIRELESS BUILDING BLOCKS

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CODING APPROACHES TO FAULT TOLERANCE IN COMBINATION AND DYNAMIC

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STREAM PROCESSOR ARCHITECTURE

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LOGIC SYNTHESIS AND VERIFICATION

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ERROR CODING FOR ENGINEERS

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MODELING AND SIMULATION ENVIRONMENT FOR SATELLITE AND TERRESTRIAL

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List of Figures

3.21

A double section matching network to transform 50

Ohm load to two different optimum loads correspond-

ing to two different frequency bands

DC power (PDC), input power (Pin), and output power

(Pout) (b) Efficiency and Power added efficiency (PAE)

versus number of gate fingers (CDMA 1.9GHz)

(a) DC power (PDC), input power (Pin), and output

power (Pout) (b) efficiency and power added efficiency

(PAE) versus number of gate fingers (2.442GHz)

Schematic of class E PA operating at 1.9GHz.

(a)Variation of output power and efficiency at 1.9GHz,

(b) Input matching.

Simplified schematic of the power amplifier.

Determination of the optimum load.

(a) A Fixed gain band-pass stage, (b) Parallel band-pass

stages to implement power control.

The gain (S21) and the real part of the input impedance

vs the number of fingers of the input transistor.

Effect of variation of the number of fingers on the out-

put power and efficiency

The core of the controllable gain power amplifier.

Layout of the transistor in the output stage.

The complete chip layout.

The schematic of the amplifier together with pads, bond-

wire inductances, and the external matching elements.

Simulation results (a) The output power and efficiency,

(b) Input and output S-parameters.

Chip micrograph.

Measurement results of the input matching.

Measured output power versus frequency.

Measured output power and PAE versus input power.

Measured data showing the variation of the gain with

control voltage settings.

Measured output power and efficiency vs. supply volt-

age at 1.91GHz.

Possible power amplifier arrangements to support all

Bluetooth classes of transmission

The schematic of the buffer stage.

3.22

3.23

3.24

3.25

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

4.10

4.11

4.12

4.13

4.14

4.15

4.16

5.1

5.2

eBook ISBN:

0-306-4

7320

Print ISBN:

0-792-37628-5

New York, Boston, Dordrecht, London, Moscow

No part of this eBook may be reproduced or transmitted in any form or by any means, electronic,

mechanical, recording, or otherwise, without written consent from the Publisher

Created in the United States of America

Visit Kluwer Online at:

http://www.kluweronline.com

and Kluwer's eBookstore at:

http://www.ebooks.kluweronline.com

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