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DUAL 64-STAGE STATIC SHIFT REGISTER
HCC/HCF4517B
DUAL 64-STAGE STATIC SHIFT REGISTER
.
CLOCK FREQUENCY 12MHz (TYP.) AT V
DD
=
10V
.
THREE-STATE OUTPUTS
.
QUIESCENT CURRENT SPECIFIED AT 20V
.
STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
EY
(Plastic Package)
F
(Ceramic Package)
FOR HCC DEVICE
.
5V, 10V, AND 15V PARAMETRIC RATINGS
.
INPUT CURREN OF 100nA AT 18V AND 25
°
C
FOR HCC DEVICE
.
100% TESTED FOR QUIESCENT CURRENT
.
MEETS ALL REQUIREMENTS OF JEDEC TEN-
C1
(Chip Carrier)
. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
°
ORDER CODES :
HCC4517BF
HCF4517BM1
HCF4517BC1
PIN CONNECTIONS
DESCRIPTION
The
HCC4517B
(extended temperature range) and
HCF4517B
(intermediate temperature range) are
monolithic integrated circuits, available in 16-lead
dual in-line plastic or ceramic package.
The
HCC/HCF4517B
dual 64-stage static shift reg-
ister consists of two independent registers each
having a clock, data, and write enable input and out-
puts accessible at taps following the 16th, 32nd,
48th, and 64th stages. These taps also serve as
input points allowing data to be inputted at the 17th,
33rd, and 49th stages when the write enable input
is a logic 1 and the clock goes through a low-to-high
transition. The truth table indicates how the clock
and write enable inputs control the operation of the
HCC/HCF4517B
. Inputs at the intermediate taps
allow entry of 64 bits into the register with 16 clock
pulses. The 3-state outputs permit connection of this
device to an external bus.
September 1988
1/12
.
SCHMITT TRIGGER CLOCK INPUTS ALLOW
OPERATION WITH VERY SLOW CLOCK RISE
AND FALL TIMES
TATIVE STANDARD N
HCC/HCF4517B
FUNCTIONAL DIAGRAM
(one half)
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
DD
*
Supply Voltage :
HCC
Types
HCF
Types
– 0.5 to + 20
– 0.5 to + 18
V
V
V
i
Input Voltage
– 0.5 to V
DD
+ 0.5
V
I
I
DC Input Current (any one input)
±
10
mA
P
tot
Total Power Dissipation (per package)
Dissipation per Output Transistor
for T
op
= Full Package-temperature Range
200
mW
100
mW
T
op
Operating Temperature :
HCC
Types
HCF
Types
– 55 to + 125
–40to+85
C
°
C
T
stg
Storage Temperature
– 65 to + 150
°
C
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
* All voltages are with respect to V
SS
(GND).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage :
HCC
Types
HCF
Types
3to18
3to15
V
V
V
I
Input Voltage
0 to V
DD
V
T
op
Operating Temperature :
HCC
Types
HCF
Types
–55to+125
–40to+85
C
°
C
2/12
°
°
HCC/HCF4517B
LOGIC DIAGRAM AND TRUTH TABLE
Clock
Write
Enable
Data
Stage 1 6
Tap
Stage 3 2
Tap
Stage 4 8
Tap
Stage 6 4
Tap
0
0
X
Q16
Q32
Q48
Q64
0
1
X
Z
Z
Z
Z
1
0
X
Q16
Q32
Q48
Q64
1
1
X
Z
Z
Z
Z
–
–
0
DI In
Q16
Q32
Q48
Q64
–
1
Di In
D17 In
D33 In
D49 In
Z
–
\
–
0
X
Q16
Q32
Q48
Q64
–
\
–
1
X
Z
Z
Z
Z
3/12
/
HCC/HCF4517B
STATIC ELECTRICAL CHARACTERISTICS
(over recommended operating conditions)
Test Conditions
Val ue
Symbol
Parameter
V
I
V
O
|I
O
|V
DD
T
Low
*
25
°
C
T
Hi g h
*
Unit
(V)
(V)
(
m
A) (V)
Min. Max. Min. Typ. Max. Min. Max.
I
L
Quiescent
Current
0/ 5
5
5
0.04
5
150
HCC
Types
0/10
10
10
0.04 10
300
0/15
15
20
0.04 20
600
0/20
20
100
0.08 100
3000
m
A
HCF
Types
0/ 5
5
20
0.04 20
150
0/10
10
40
0.04 40
300
0/15
15
80
0.04 80
600
V
OH
Output High
Voltage
0/ 5
< 1
5
4.95
4.95
4.95
0/10
< 1 10 9.95
9.95
9.95
V
0/15
< 1 15 14.95
14.95
14.95
V
OL
Output Low
Voltage
5/0
< 1
5
0.05
0.05
0.05
10/0
< 1 10
0.05
0.05
0.05
V
15/0
< 1 15
0.05
0.05
0.05
V
IH
Input High
Voltage
0.5/4.5 < 1
5
3.5
3.5
3.5
1/9
< 1 10
7
7
7
V
1.5/13.5 < 1 15
11
11
11
V
IL
Input Low
Voltage
4.5/0.5 < 1
5
1.5
1.5
1.5
9/1
< 1 10
3
3
3
V
13.5/1.5 < 1 15
4
4
4
I
OH
Output
Drive
Current
0/ 5
2.5
5
– 2
– 1.6 – 3.2
– 1.15
HCC
Types
0/ 5
4.6
5 – 0.64
– 0.51 – 1
– 0.36
0/10
9.5
10 – 1.6
– 1.3 – 2.6
– 0.9
0/15 13.5
15 – 4.2
– 3.4 – 6.8
– 2.4
mA
0/ 5
2.5
5 – 1.53
– 1.36 – 3.2
– 1.1
HCF
Types
0/ 5
4.6
5 – 0.52
– 0.44 – 1
– 0.36
0/10
9.5
10 – 1.3
– 1.1 – 2.6
– 0.9
0/15 13.5
15 – 3.6
– 3.0 – 6.8
– 2.4
I
OL
Output
Sink
Current
HCC
Types
0/ 5
0.4
5
0.64
0.51
1
0.36
0/10
0.5
10
1.6
1.3
2.6
0.9
0/15
1.5
15
4.2
3.4
6.8
2.4
mA
0/ 5
0.4
5
0.52
0.44
1
0.36
HCF
Types
0/10
0.5
10
1.3
1.1
2.6
0.9
0/15
1.5
15
3.6
3.0
6.8
2.4
I
IH
,I
IL
Input
Leakage
Current
HCC
Types
0/18
18
±
0.1
±
10
–5
±
0.1
±
1
Any Input
m
A
HCF
Types
0/15
15
±
0.3
±
10
–5
±
0.3
±
1
I
OH
,I
OL
3-State
Output
Leakage
Current
HCC
Types
0/18
18
±
0.4
±
10
–4
±
0.4
±
12
HCF
Types
0/18
15
±
1.0
±
10
–4
±
1.0
±
7.5
m
A
C
I
Input Capacitance
Any Input
5
7.5
pF
*T
Lo w
=–55
°
Cfor
HCC
device : – 40
°
C for
HCF
device.
C for
HCF
device.
The Noise Margin for both ”1” and ”0” level is : 1V min. with V
DD
= 5V, 2V min. with V
DD
= 10V, 2.5V min. with V
DD
=15V,
°
C for
HCC
device : + 85
°
4/12
*T
High
= + 125
HCC/HCF4517B
DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
=25
°
C, Input t
r
,t
f
= 20ns, C
L
= 50pF,
R
L
= 200k
W
)
Symbol
Parameter
Test Conditions
Val ue
Unit
V
DD
(V)
Min. Typ. Max.
t
PHL
,t
PLH
Propagation Delay Time :
CL to Bit 16 Tap
5
200
400
10
110
220
ns
15
90
180
t
PL Z
,t
PHZ
t
PZL
,t
PZH
3-State Output WE to Bit 16 Tap
(see note)
5
75
150
10
40
80
ns
15
30
60
t
THL
,t
TLH
Output Transition Time
5
100
200
10
50
100
ns
15
40
80
t
se tup
Write Enable to Clock
5
– 100 – 50
10
– 50 – 25
ns
15
– 30 – 15
t
se tup
Data to Clock
5
– 100 – 50
10
– 60 – 30
ns
15
– 30 – 15
Write Enable to Clock
Release Time
5
50
100
10
25
50
ns
15
20
40
t
hold
Data to Clock
5
100
200
10
50
100
ns
15
25
50
t
W
Minimum Clock Pulse Width
5
90
180
10
40
80
ns
15
25
50
f
CL
Maximum Clock Input
Frequency
5
3
6
10
6
12
MHz
15
8
15
t
f
,t
r
Maximum Clock Input Rise
or Fall Time
5
10
15
UNLIMITED
m
s
Note
: Measured at the point of 10% change in output load of 50pF, R
L
=1k
W
to V
DD
for t
PZL
,
PLZ
and R
L
=1k
W
to V
SS
for t
PHZ.
5/12
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