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ADuC812 MicroConverter, Multichannel 12-bit ADC with Embedded Flash MCU Data Sheet (REV. E)
a
MicroConverter ® , Multichannel
12-Bit ADC with Embedded Flash MCU
ADuC812
C Voltage Reference
High Speed 200 kSPS
DMA Controller for High Speed ADC-to-RAM Capture
2 12-Bit Voltage Output DACs
On-Chip Temperature Sensor Function
Memory
8K Bytes On-Chip Flash/EE Program Memory
640 Bytes On-Chip Flash/EE Data Memory
256 Bytes On-Chip Data RAM
16M Bytes External Data Address Space
64K Bytes External Program Address Space
8051 Compatible Core
12 MHz Nominal Operation (16 MHz Max)
3 16-Bit Timer/Counters
High Current Drive Capability—Port 3
9 Interrupt Sources, 2 Priority Levels
Power
Specified for 3 V and 5 V Operation
Normal, Idle, and Power-Down Modes
On-Chip Peripherals
UART and SPI ® Serial I/O
2-Wire (400 kHz I 2 C ® Compatible) Serial I/O
Watchdog Timer
Power Supply Monitor
APPLICATIONS
Intelligent Sensors Calibration and Conditioning
Battery-Powered Systems (Portable PCs, Instruments,
Monitors)
Transient Capture Systems
DAS and Communications Systems
Control Loop Monitors (Optical Networks/Base Stations)
GENERAL DESCRIPTION
The ADuC812 is a fully integrated 12-bit data acquisition system
incorporating a high performance self-calibrating multichannel
ADC, dual DAC, and programmable 8-bit MCU (8051 instruc-
tion set compatible) on a single chip.
The programmable 8051 compatible core is supported by 8K
bytes Flash/EE program memory, 640 bytes Flash/EE data
memory, and 256 bytes data SRAM on-chip.
Additional MCU support functions include Watchdog Timer,
Power Supply Monitor, and ADC DMA functions. Thirty-two
programmable I/O lines, I 2 C compatible SPI and Standard
UART Serial Port I/O are provided for multiprocessor interfaces
and I/O expansion.
Normal, idle, and power-down operating modes for both the
MCU core and analog converters allow flexible power manage-
ment schemes suited to low power applications. The part is
specified for 3 V and 5 V operation over the industrial tem-
perature range and is available in a 52-lead, plastic quad
flatpack package, and in a 56-lead, chip scale package.
FUNCTIONAL BLOCK DIAGRAM
P0.0–P0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
ADC
CONTROL
AND
CALIBRATION
LOGIC
DAC0
BUF
DAC0
AIN0 (P1.0)–AIN7 (P1.7)
DAC
CONTROL
AIN
MUX
T/H
DAC1
BUF
DAC1
T0 (P3.4)
T1 (P3.5)
T2 (P1.0)
T2EX (P1.1)
INT0 (P3.2)
INT1 (P3.3)
ALE
PSEN
EA
RESET
MICROCONTROLLER
8051 BASED
MICROCONTROLLER CORE
POWER SUPPLY
MONITOR
WATCHDOG
TIMER
16-BIT
TIMER/COUNTERS
3
2.5V
REF
TEMP
SENSOR
8K 8 PROGRAM
FLASH EEPROM
2-WIRE
SERIAL I/O
SPI
V REF
BUF
8 USER
FLASH EEPROM
256
640
UART
MUX
ADuC812
8 USER
RAM
OSC
C REF
AV DD
AGND
DV DD
DGND
XTAL1
XTAL2
RxD
(P3.0)
TxD
(P3.1)
SCLOCK
MOSI/
SDATA
MISO
(P3.3)
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
FEATURES
Analog I/O
8-Channel, High Accuracy 12-Bit ADC
On-Chip, 100 ppm/
740134900.004.png 740134900.005.png 740134900.006.png 740134900.007.png
ADuC812
TABLE OF CONTENTS
APPLICATONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
PIN CONFIGURATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ADC SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Integral Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Differential Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Offset Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Full-Scale Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Signal to (Noise + Distortion) Ratio . . . . . . . . . . . . . . . . . . . . 8
Total Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DAC SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Relative Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Voltage Output Settling Time . . . . . . . . . . . . . . . . . . . . . . . . . 8
Digital-to-Analog Glitch Impulse . . . . . . . . . . . . . . . . . . . . . . . 8
MEMORY ORGANIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Accumulator SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
B SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Stack Pointer SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Data Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Program Status Word SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Power Control SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
General Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
ADC Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Typical Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
ADCCON3—(ADC Control SFR #3) . . . . . . . . . . . . . . . . . 14
Configuring the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
ADC DMA Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DMA Mode Configuration Example . . . . . . . . . . . . . . . . . . . 17
Offset and Gain Calibration Coefficients . . . . . . . . . . . . . . . . 17
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Flash Memory Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Flash/EE Memory and the ADuC812 . . . . . . . . . . . . . . . . . . 18
ADuC812 Flash/EE Memory Reliability . . . . . . . . . . . . . . . . 18
Using the Flash/EE Data Memory . . . . . . . . . . . . . . . . . . . . . 19
Flash/EE Memory Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Using the Flash/EE Memory Interface . . . . . . . . . . . . . . . . . . 20
Erase-All . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Program a Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
USER INTERFACE TO OTHER ON-CHIP
POWER SUPPLY MONITOR . . . . . . . . . . . . . . . . . . . . . . . . . 24
MISO (Master In, Slave Out Data I/O Pin) . . . . . . . . . . . . . . 25
SCLOCK (Serial Clock I/O Pin) . . . . . . . . . . . . . . . . . . . . . . 26
SS (Slave Select Input Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SPI Interface—Master Mode . . . . . . . . . . . . . . . . . . . . . . . . . 27
SPI Interface—Slave Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Parallel I/O Ports 0–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Timers/Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
TH0 and TL0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
TH1 and TL1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
TIMER/COUNTERS 0 AND 1 OPERATING MODES . . . . . 32
Mode 1 (16-Bit Timer/Counter) . . . . . . . . . . . . . . . . . . . . . . 32
Mode 2 (8-Bit Timer/Counter with Auto Reload) . . . . . . . . . 32
Mode 3 (Two 8-Bit Timer/Counters) . . . . . . . . . . . . . . . . . . 32
TH2 and TL2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
RCAP2H and RCAP2L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
16-Bit Autoreload Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
16-Bit Capture Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Mode 1 (8-Bit UART, Variable Baud Rate) . . . . . . . . . . . . . . 36
Mode 2 (9-Bit UART with Fixed Baud Rate) . . . . . . . . . . . . 36
Mode 3 (9-Bit UART with Variable Baud Rate) . . . . . . . . . . 36
UART Serial Port Baud Rate Generation . . . . . . . . . . . . . . . 36
Timer 2 Generated Baud Rates . . . . . . . . . . . . . . . . . . . . . . . 37
Interrupt Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Clock Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
External Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
In-Circuit Serial Download Access . . . . . . . . . . . . . . . . . . . . 44
Embedded Serial Port Debugger . . . . . . . . . . . . . . . . . . . . . . 44
Single-Pin Emulation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Enhanced-Hooks Emulation Mode . . . . . . . . . . . . . . . . . . . . 45
Typical System Configuration . . . . . . . . . . . . . . . . . . . . . . . . 45
Download—In-Circuit Serial Downloader . . . . . . . . . . . . . . . 45
DeBug—In-Circuit Debugger . . . . . . . . . . . . . . . . . . . . . . . . 45
ADSIM—Windows Simulator . . . . . . . . . . . . . . . . . . . . . . . . 45
–2–
REV. E
SPECIFICATIONS 1, 2
ADuC812
f SAMPLE = 200 kHz, DAC V OUT Load to AGND; R L = 2 k
(AV DD = DV DD = 3.0 V or 5.0 V
, C L = 100 pF. All specifications T A = T MIN to T MAX , unless otherwise noted.)
10%, REF IN /REF OUT = 2.5 V Internal Reference, MCLKIN = 11.0592 MHz,
ADuC812BS
Parameter
V DD = 5 V
V DD = 3 V
Unit
Test Conditions/Comments
ADC CHANNEL SPECIFICATIONS
DC ACCURACY 3, 4
Resolution
12
12
Bits
Integral Nonlinearity
±1/2
±1/2
LSB typ
f SAMPLE = 100 kHz
±1.5
±1.5
LSB max
f SAMPLE = 100 kHz
±1.5
±1.5
LSB typ
f SAMPLE = 200 kHz
Differential Nonlinearity
±1
±1
LSB typ
f SAMPLE = 100 kHz. Guaranteed No
Missing Codes at 5 V
CALIBRATED ENDPOINT ERRORS 5, 6
Offset Error
±5
±5
LSB max
±1
±1
LSB typ
Offset Error Match
1
1
LSB typ
Gain Error
±6
±6
LSB max
±1
±1
LSB typ
Gain Error Match
1.5
1.5
LSB typ
USER SYSTEM CALIBRATION 7
Offset Calibration Range
±5
±5
% of V REF typ
Gain Calibration Range
±2.5
±2.5
% of V REF typ
DYNAMIC PERFORMANCE
f IN = 10 kHz Sine Wave
f SAMPLE = 100 kHz
Signal-to-Noise Ratio (SNR) 8
70
70
dB typ
Total Harmonic Distortion (THD)
–78
–78
dB typ
Peak Harmonic or Spurious Noise
–78
–78
dB typ
ANALOG INPUT
Input Voltage Ranges
0 to V REF
0 to V REF
V
Leakage Current
±1
±1
µA max
±0.1
±0.1
µA typ
Input Capacitance 9
20
20
pF max
TEMPERATURE SENSOR 10
Voltage Output at 25°C
600
600
mV typ
Can vary significantly (> ±20%)
Voltage TC
–3.0
–3.0
mV/°C typ
from device to device
DAC CHANNEL SPECIFICATIONS
DC ACCURACY 11
Resolution
12
12
Bits
Relative Accuracy
±3
±3
LSB typ
Differential Nonlinearity
±0.5
±1
LSB typ
Guaranteed 12-Bit Monotonic
Offset Error
±60
±60
mV max
±15
±15
mV typ
Full-Scale Error
±30
±30
mV max
±10
±10
mV typ
Full-Scale Mismatch
±0.5
±0.5
% typ
% of Full-Scale on DAC1
ANALOG OUTPUTS
Voltage Range_0
0 to V REF
0 to V REF
V typ
Voltage Range_1
0 to V DD
0 to V DD
V typ
Resistive Load
10
10
kΩ typ
Capacitive Load
100
100
pF typ
Output Impedance
0.5
0.5
Ω typ
I SINK
50
50
µA typ
REV. E
–3–
740134900.001.png
ADuC812
SPECIFICATIONS 1, 2 (continued)
ADuC812BS
Parameter
V DD = 5 V
V DD = 3 V
Unit
Test Conditions/Comments
DAC AC CHARACTERISTICS
Voltage Output Settling Time
15
15
µs typ
Full-Scale Settling Time to
within 1/2 LSB of Final Value
Digital-to-Analog Glitch Energy
10
10
nV sec typ
1 LSB Change at Major Carry
REFERENCE INPUT/OUTPUT
REF IN Input Voltage Range 9
2.3/V DD
2.3/V DD
V min/max
Input Impedance
150
150
k
Ω
typ
REF OUT Output Voltage
2.5 ± 2.5%
2.5 ± 2.5%
V min/max
Initial Tolerance @ 25°C
2.5
2.5
V typ
REF OUT Tempco
100
100
ppm/°C typ
FLASH/EE MEMORY PERFORMANCE
CHARACTERISTICS 12, 13
Endurance
10,000
Cycles min
50,000
50,000
Cycles typ
Data Retention
10
Years min
WATCHDOG TIMER
CHARACTERISTICS
Oscillator Frequency
64
64
kHz typ
POWER SUPPLY MONITOR
CHARACTERISTICS
Power Supply Trip Point Accuracy
±2.5
±2.5
% of Selected
Nominal Trip
Point Voltage
max
±1.0
±1.0
% of Selected
Nominal Trip
Point Voltage
typ
DIGITAL INPUTS
Input High Voltage (V INH )
2.4
2.4
V min
XTAL1 Input High Voltage (V INH ) Only 4
V min
Input Low Voltage (V INL )
0.8
0.8
V max
Input Leakage Current (Port 0, EA)
±10
±10
µA max
V IN = 0 V or V DD
±1
±1
µA typ
V IN = 0 V or V DD
Logic 1 Input Current
(All Digital Inputs)
±10
±10
µA max
V IN = V DD
±1
±1
µA typ
V IN = V DD
Logic 0 Input Current (Port 1, 2, 3)
–80
–40
µA max
–40
–20
µA typ
V IL = 450 mV
Logic 1-0 Transition Current (Port 1, 2, 3) –700
–500
µA max
V IL = 2 V
–400
–200
µA typ
V IL = 2 V
Input Capacitance
10
10
pF typ
–4–
REV. E
740134900.002.png
ADuC812
ADuC812BS
Parameter
V DD = 5 V
V DD = 3 V
Unit
Test Conditions/Comments
DIGITAL OUTPUTS
Output High Voltage (V OH )
2.4
2.4
V min
V DD = 4.5 V to 5.5 V
I SOURCE = 80 µA
4.0
2.6
V typ
V DD = 2.7 V to 3.3 V
I SOURCE = 20 µA
Output Low Voltage (V OL )
ALE, PSEN , Ports 0 and 2
0.4
0.4
V max
I SINK = 1.6 mA
0.2
0.2
V typ
I SINK = 1.6 mA
Port 3
0.4
0.4
V max
I SINK = 8 mA
0.2
0.2
V typ
I SINK = 8 mA
Floating State Leakage Current
±10
±10
µA max
±1
±1
µA typ
Floating State Output Capacitance
10
10
pF typ
POWER REQUIREMENTS 14, 15, 16
I DD Normal Mode 17
43
25
mA max
MCLKIN = 16 MHz
32
16
mA typ
MCLKIN = 16 MHz
26
12
mA typ
MCLKIN = 12 MHz
8
3
mA typ
MCLKIN = 1 MHz
I DD Idle Mode
25
10
mA max
MCLKIN = 16 MHz
18
6
mA typ
MCLKIN = 16 MHz
15
6
mA typ
MCLKIN = 12 MHz
7
2
mA typ
MCLKIN = 1 MHz
I DD Power-Down Mode 18
30
15
µA max
5
5
µA typ
NOTES
1 Specifications apply after calibration.
2 Temperature range –40°C to +85°C.
3 Linearity is guaranteed during normal MicroConverter core operation.
4 Linearity may degrade when programming or erasing the 640 byte Flash/EE space during ADC conversion times due to on-chip charge pump activity.
5 Measured in production at V DD = 5 V after Software Calibration Routine at 25°C only.
6 User may need to execute Software Calibration Routine to achieve these specifications, which are configuration dependent.
7 The offset and gain calibration spans are defined as the voltage range of user system offset and gain errors that the ADuC812 can compensate.
8 SNR calculation includes distortion and noise components.
9 Specification is not production tested, but is supported by characterization data at initial product release.
10 The temperature sensor will give a measure of the die temperature directly; air temperature can be inferred from this result.
11 DAC linearity is calculated using:
Reduced code range of 48 to 4095, 0 to V REF range
Reduced code range of 48 to 3995, 0 to V DD range
DAC output load = 10 k
Ω
I DD = (1.6 nAs
×
MCLKIN) + 6 mA
Normal Mode (V DD = 3 V):
I DD = (0.8 nAs
×
MCLKIN) + 3 mA
Idle Mode (V DD = 5 V):
I DD = (0.75 nAs
×
MCLKIN) + 6 mA
MCLKIN) + 3 mA
where MCLKIN is the oscillator frequency in MHz and resultant I DD values are in mA.
15 I DD currents are expressed as a summation of analog and digital power supply currents during normal MicroConverter operation.
16 I DD is not measured during Flash/EE program or erase cycles; I DD will typically increase by 10 mA during these cycles.
17 Analog I DD = 2 mA (typ) in normal operation (internal V REF , ADC, and DAC peripherals powered on).
18 EA = Port0 = DV DD , XTAL1 (Input) tied to DV DD , during this measurement.
Typical specifications are not production tested, but are supported by characterization data at initial product release.
Timing Specifications—See Pages 46–55.
Specifications subject to change without notice.
Please refer to User Guide, Quick Reference Guide, Application Notes, and Silicon Errata Sheet at www.analog.com/microconverter f or additional information.
I DD = (0.25 nAs
×
REV. E
–5–
and 50 pF.
12 Flash/EE Memory Performance Specifications are qualified as per JEDEC Specification (Data Retention) and JEDEC Draft Specification A117 (Endurance).
13 Endurance Cycling is evaluated under the following conditions:
Mode = Byte Programming, Page Erase Cycling
Cycle Pattern = 00H to FFH
Erase Time = 20 ms
Program Time = 100 µs
14 I DD at other MCLKIN frequencies is typically given by:
Normal Mode (V DD = 5 V):
Idle Mode (V DD = 3 V):
740134900.003.png

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