A3977-Datasheet.pdf
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A3977
Microstepping DMOS Driver with Translator
Features and Benefits
▪ ±2.5 A, 35 V output rating
▪ Low r
DS(on)
outputs, 0.45 Ω source, 0.36 Ω sink typical
▪ Automatic current decay mode detection/selection
▪ 3.0 to 5.5 V logic supply voltage range
▪ Mixed, fast, and slow current decay modes
▪ Home output
▪ Synchronous rectification for low power dissipation
▪ Internal UVLO and thermal shutdown circuitry
▪ Crossover-current protection
Description
The A3977 is a complete microstepping motor driver, with built-
in translator. It is designed to operate bipolar stepper motors in
full-, half-, quarter-, and eighth-step modes, with output drive
capability of 35 V and ±2.5 A. The A3977 includes a fixed
off-time current regulator that has the ability to operate in
slow-, fast-, or mixed-decay modes. This current-decay control
scheme results in reduced audible motor noise, increased step
accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of the
A3977. Simply inputting one pulse on the STEP input drives the
motor one step (two logic inputs determine if it is a full-, half-,
quarter-, or eighth-step). There are no phase-sequence tables,
high-frequency control lines, or complex interfaces to program.
The A3977 interface is an ideal fit for applications where a
complex microprocessor is unavailable or over-burdened.
Packages:
Package ED, 44-pin PLCC
with internally fused pins
Internal synchronous-rectification control circuitry is provided
to improve power dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage lockout (UVLO) and crossover-current
protection. Special power-up sequencing is not required.
Package LP, 28-pin TSSOP
with exposed thermal pad
The A3977 is supplied in a choice of two power packages, a
44-pin plastic PLCC with 3 internally-fused pins on each of
four sides (suffix ED), and a thin (<1.2 mm), 28-pin TSSOP
with an exposed thermal pad (suffix LP). Both packages are
lead (Pb) free, with 100% matte tin leadframe plating.
Not to scale
Pin-out Diagram
6
5
4
3
2
1
44
43
42
41
40
V
BB1
NC
7
39
NC
NC
CP
2
8
38
PWM
TIMER
PFD
9
37
CP
1
RC
1
10
V
CP
36
GND
11
35
GND
GND
12
GND
34
GND
13
33
GND
REG
REF
14
32
V
REG
÷8
RC
2
STEP
15
31
LOGIC
SUPPLY
16
V
DD
30
NC
NC
NC
17
29
V
BB2
18
21
22
23
19
20
24
25
26
27
28
Dwg. PP-075-1
26184.22J
A3977
Microstepping DMOS Driver with Translator
Selection Guide
Ambient Temperature, T
A
(°C)
Part Number
Packing
Package
A3977KEDTR-T
450 per reel
44-pin PLCC
–40 to 125
A3977SEDTR-T
450 per reel
44-pin PLCC
–20 to 85
A3977SLPTR-T
4000 per reel
28-pin TSSOP
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
Load Supply Voltage
V
BB
35
V
Logic Supply Voltage
V
DD
7.0
V
Pulsed, t
w
> 30 ns
–0.3 to V
DD
+ 0.3
V
Logic Input Voltage Range
V
IN
Pulsed, t
w
< 30 ns
–1.0 to V
DD
+ 1
V
Reference Voltage
V
REF
V
DD
V
Sense Voltage (DC)
V
SENSE
0.5
V
Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction temperature
of 150°C.
Output Current
I
OUT
±2.5
A
Range K
–40 to 125
ºC
Operating Ambient Temperature
T
A
Range S
–20 to 85
ºC
Maximum Junction Temperature
T
J
(max)
150
ºC
Storage Temperature
T
stg
–55 to 150
ºC
Thermal Characteristics
Characteristic
Symbol
Test Conditions*
Value
Units
Package ED, on 4-layer PCB based on JEDEC standard
22
ºC/W
Package Thermal Resistance
R
θJA
Package LP, on 4-layer PCB based on JEDEC standard
28
ºC/W
*Additional thermal information available on the Allegro website.
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3977
Microstepping DMOS Driver with Translator
FUNCTIONAL BLOCK DIAGRAM
VREG
CP 2
CP 1
LOGIC
SUPPLY
VDD
LOAD
SUPPLY
VCP
2 V
UVLO
AND
FAULT
CHARGE
PUMP
REGULATOR
BANDGAP
REF.
SUPPLY
VBB1
REF
DMOS H BRIDGE
DAC
SENSE1
VCP
+ -
OUT 1A
RC1
PWM LATCH
BLANKING
MIXED DECAY
OUT1B
PWM TIMER
4
STEP
DIR
SENSE1
RESET
MS 1
DMOS H BRIDGE
MS 2
HOME
VBB2
SLEEP
OUT 2A
SR
V
PFD
OUT2B
ENABLE
PWM TIMER
PFD
PWM LATCH
BLANKING
MIXED DECAY
4
RC 2
+ -
SENSE2
DAC
Dwg. FP-050-2
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3977
Microstepping DMOS Driver with Translator
LP Pin-out
(TSSOP)
Table 1. Microstep Resolution Truth Table
MS
1
MS
2
Resolution
L
L
Full step (2 phase)
H
L
Half step
L
H
Quarter step
H
H
Eighth step
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3977
Microstepping DMOS Driver with Translator
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 35 V, V
DD
= 3.0 V to 5.5V (unless otherwise noted)
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Output Drivers
Operating
8.0
–
35
V
Load Supply Voltage Range
V
BB
During sleep mode
0
–
35
V
V
OUT
= V
BB
–
<1.0
20
μA
Output Leakage Current
I
DSS
V
OUT
= 0 V
–
<1.0
-20
μA
Source driver, I
OUT
= -2.5 A
–
0.45
0.57
Ω
Output On Resistance
r
DS(on)
Sink driver, I
OUT
= 2.5 A
–
0.36
0.43
Ω
Source diode, I
F
= -2.5 A
–
–
1.4
V
Body Diode Forward Voltage
V
F
Sink diode, I
F
= 2.5 A
–
–
1.4
V
f
PWM
< 50 kHz
–
–
8.0
mA
Motor Supply Current
I
BB
Operating, outputs disabled
–
–
6.0
mA
Sleep mode
–
–
20
μA
Control Logic
Logic Supply Voltage Range
V
DD
Operating
3.0
5.0
5.5
V
V
IN(1)
0.7V
DD
–
–
V
Logic Input Voltage
V
IN(0)
–
–
0.3V
DD
V
I
IN(1)
V
IN
= 0.7V
DD
-20
<1.0
20
μA
Logic Input Current
I
IN(0)
V
IN
= 0.3V
DD
-20
<1.0
20
μA
Maximum STEP Frequency
f
STEP
500*
–
–
kHz
V
OH
I
OH
= -200 μA
0.7V
DD
–
–
V
HOME Output Voltage
V
OL
I
OL
= 200 μA
–
–
0.3V
DD
V
Blank Time
t
BLANK
R
t
= 56 kΩ, C
t
= 680 pF
700
950
1200
ns
Fixed Off Time
t
off
R
t
= 56 kΩ, C
t
= 680 pF
30
38
46
μs
PFDH
–
0.6V
DD
–
V
Mixed Decay Trip Point
PFDL
–
0.21V
DD
–
V
Ref. Input Voltage Range
V
REF
Operating
0
–
V
DD
V
Reference Input Current
I
REF
–
0
±3.0
μA
V
REF
= 2 V, Phase Current = 38.27%
–
–
±10
%
Gain (G
m
) Error (note 3)
E
G
V
REF
= 2 V, Phase Current = 70.71%
–
–
±5.0
%
V
REF
= 2 V, Phase Current = 100.00%
–
–
±5.0
%
Crossover Dead Time
t
DT
SR enabled
100
475
800
ns
Continued on the next page…
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Plik z chomika:
maro1189
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