EMIF02-USB03F2.pdf

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2 LINES EMI FILTER INCLUDING ESD PROTECTION
®
EMIF02-USB03F2
IPAD™
2 LINES EMI FILTER
INCLUDING ESD PROTECTION
PRODUCT CHARACTERISTICS
ESD protection and EMI filtering for:
USB OTG port
DESCRIPTION
The EMIF02-USB03F2 is a highly integrated array
designed to suppress EMI / RFI noise for USB
OTG (On The Go).
The EMIF02-USB03F2 Flip-Chip packaging means
the package size is equal to the die size.
Additionally, this filter includes an ESD protection
circuitry which prevents the protected device from
destruction when subjected to ESD surges up to
15 kV on external contacts.
Flip-Chip
(11 Bumps)
Figure 1: Pin Configuration (ball side)
BENEFITS
2 lines low-pass-filter + 2 lines ESD protection
3
2
1
High efficiency in EMI filtering
Lead Free package
ID
Dz
A
Very low PCB space consuming: < 3.25 mm 2
Very thin package: 0.65 mm
B
High efficiency in ESD suppression
(IEC61000-4-2 level 4)
Vbus
Pup
Pd1
High reliability offered by monolithic integration
D+
out
Pd2
D+
in
C
High reducing of parasitic elements through
integration and wafer level packaging.
D-
out
GND
D-
in
D
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4 on external pins 15kV (air discharge)
8kV (contact discharge)
Figure 2: Schematic
Level 1 on internal pins 2kV (air and contact
discharge)
Pup
Dz
ID Vbus
EMIF02-USB03F2
R3=1.3k
D+OUT
R2=33
D+IN
D-OUT
R1=33
D-IN
CC
R5=15k
R4=17k
Table 1: Order Code
Part Number
Marking
Pd2
Pd1
EMIF02-USB03F2
FU
Cline = 20 pF max.
TM: IPAD is a trademark of STMicroelectronics.
October 2004
REV. 3
1/7
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EMIF02-USB03F2
Table 2: Absolute Ratings (T amb = 25°C))
Symbol
Parameter and test conditions
Value
Unit
External pins (D1, C1, A2, A3, B3)
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
15
8
V PP
kV
Internal pins (D3, C3, C2, B2, B1)
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharg
2
2
T j
Maximum junction temperature
125
°C
T op
Operating temperature range
- 40 to + 85
°C
T stg
Storage temperature range
- 55 to + 150
°C
Table 3: Electrical Characteristics (T amb = 25°C )
Symbol
Parameter
V BR Breakdown voltage
I RM
Leakage current @ V RM
V RM Stand-off voltage
V CL
Clamping voltage
Rd
Dynamic impedance
I PP
Peak pulse current
C line Input line capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V BR
I R = 1 mA
14
V
I RM
V RM = 3V
0.1
0.5
µA
C line
@ 0V
20
pF
R 1 ,R 2
Tolerance ± 5%
33
R 3
Tolerance ± 5%
1.30
k
R 4
Tolerance ± 5%
17
k
R 5
Tolerance ± 5%
15
k
Figure 3: Application Schematic
3.3V
Vbus
ID
Vbus
ID
Pup
Dz
ID Vbus
EMIF02-USB03F2
R3=1.3k
D+OUT
R2=33
D+IN
D+
D+
D-OUT
R1=33
D-IN
D-
D-
CC
R5=15k
R4=17k
GND
GND
Pd2
Pd1
Cline = 20 pF max.
2/7
R1 = R2 = 33
438464340.001.png 438464340.002.png
EMIF02-USB03F2
Figure 4: Filtering measurements
Figure 5: Analog crosstalk measurements
EMIF02-USB03F2_EVAL-SAMPLES_PM431
Aplac 7.70 User: ST Microelectronics
Jul 22 2004
EMIF02-USB03F2_EVAL-SAMPLES_PM431
Aplac 7.70 User: ST Microelectronics Jul 22 2004
0.00
0.00
dB
dB
-10.00
-10.00
-20.00
-30.00
-20.00
-40.00
-50.00
-30.00
-60.00
-70.00
-40.00
-80.00
-90.00
-50.00
-100.00
100.0k
1.0M
10.0M
100.0M
1.0G
100.0k
1.0M
10.0M
100.0M
1.0G
f/Hz
f/Hz
C1/C3 Line
D1/D3 Line
C1/D3 Line
A2/A3 Line
Figure 6: ESD response to IEC61000-4-2
(+15kV air discharge) on one input V(in) and on
one output (Vout)
Figure 7: ESD response to IEC61000-4-2 (-15kV
air discharge) on one input V(in) and on one
output (Vout)
Figure 8: Junction capacitance versus reverse
voltage applied (typical values)
C(pF)
20
18
16
14
12
10
8
6
4
2
V R (V)
0
0123456789012
3/7
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EMIF02-USB03F2
Figure 9: Aplac model
C3
C1
Ls
Rs
Lbump
Rbump
Rbump
Lbump
Rs
Ls
Port1
Port2
50
50
A3
A2
B3
B2
B1
C2
D2
MODEL = D02_usb03_gnd
MODEL = D02_usb03
bulk
bulk
bulk
bulk
bulk
bulk
bulk
B2
B1
C2
D2
R_1k3
R_17k
R_15k
C3
R_33R
C1
D3
R_33R
D1
Lbump
Rbump
MODEL = D02_usb03
MODEL = D02_usb03
Cgnd
Lgnd
bulk
bulk
bulk
bulk
Rsubump
Cbump Rsubump
Cbump
Rsubump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Rgnd
A2
bulk
B1
bulk
Rsubump
Cbump Rsubump
Cbump
Rsubump
Rsubump
Cbump Rsubump
Cbump
Rsubump
B2
bulk
C1
bulk
Rsubump
Cbump Rsubump
Cbump
Rsubump
Rsubump
Cbump Rsubump
Cbump
Rsubump
C2
bulk
D3
bulk
Rsubump
Cbump Rsubump
Cbump
Rsubump
Rsubump
Cbump Rsubump
Cbump
Rsubump
C3
bulk
D1
bulk
Rsubump
Cbump Rsubump
Cbump
Rsubump
Rsubump
Cbump Rsubump
Cbump
Rsubump
B3
bulk
A3
bulk
Figure 10: Aplac parameters
Ls 950pH
Rs 150m
R_33R 33
R_1k3 1.3k
R_15k 15k
R_17k 17k
Cz_usb03 11pF
Rs_usb03 1
Cz_usb03_gnd 220pF
Rs_usb03_gnd 0.9
Lgnd 50pH
Rgnd 100m
Cgnd 0.15pF
Lbump 50pH
Rbump 20m
Cbump 2.4pF
Rsubump 100m
4/7
C3
C1
Ls
Rs
Lbump
Rbump
Rbump
Lbump
Rs
Ls
Port2
Port1
50
50
A3
A2
B3
B2
B1
C2
D2
MODEL = D02_usb03_gnd
MODEL = D02_usb03
bulk
bulk
bulk
bulk
bulk
bulk
bulk
B2
B1
C2
D2
D2
R_1k3
R_17k
R_15k
Lbump
Lbump
C3
R_33R
C1
D3
R_33R
D1
Rbump
Rbump
MODEL = D02_usb03
MODEL = D02_usb03
Cgnd
Lgnd
Lgnd
bulk
bulk
bulk
bulk
Rgnd
Rgnd
Cbump
Cbump
B1
bulk
A2
bulk
Cbump
Cbump
C1
bulk
B2
bulk
Cbump
Cbump
C2
bulk
D3
bulk
Cbump
Cbump
C3
bulk
D1
bulk
Cbump
Cbump
B3
bulk
A3
bulk
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EMIF02-USB03F2
Figure 11: Order Code
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
Figure 12: FLIP-CHIP Package Mechanical Data
500µm ± 50
315µm ± 50
650µm ± 65
1.57mm ± 50µm
Figure 14: Foot Print Recommendations
Figure 15: Marking
565
400
Copper pad Diameter :
250µm recommended, 300µm max.
Dot, ST logo
xx = marking
z = packaging location
yww = datecode
(y = year
ww = week)
E
Solder stencil opening :
330µm recommended
x
y
x
w
z
w
Solder mask opening recommendation :
340µm min. for 300µm copper pad diameter
All dimensions in µm
5/7
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