74HC4049_CNV_2.pdf

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Hex inverting high-to-low level shifter
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
·
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC4049
Hex inverting high-to-low level
shifter
Product specification
File under Integrated Circuits, IC06
December 1990
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Philips Semiconductors
Product specification
Hex inverting high-to-low level shifter
74HC4049
FEATURES
This feature enables the inverting buffers to be used as
logic level translators, which will convert high level logic to
low level logic, while operating from a low voltage power
supply. For example 15 V logic (“4000B series”) can be
converted down to 2 V logic.
The actual input switch level remains related to the V CC
and is the same as mentioned in the family characteristics.
At the same time each part can be used as a simple
inverter without level translation.
·
Output capability: standard
·
I CC category: SSI
GENERAL DESCRIPTION
The 74HC4049 is a high-speed Si-gate CMOS device and
is pin compatible with the “4049” of the “4000B” series. It
is specified in compliance with JEDEC standard no. 7A.
The 74HC4049 provides six inverting buffers with a
modified input protection structure, which has no diode
connected to V CC . Input voltages of up to 15 V may
therefore be used.
APPLICATIONS
·
Converting 15 V logic (“4000B” series) down to 2 V logic.
QUICK REFERENCE DATA
GND = 0 V; T amb =25 ° C; t r =t f = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
t PHL /t PLH
propagation delay nA to nY
C L = 15 pF; V CC = 5 V
8
ns
C I
input capacitance
3.5
pF
C PD
power dissipation capacitance per buffer note 1
14
pF
Note
1. C PD is used to determine the dynamic power dissipation (P D in
m
W):
P D =C PD ´
V CC 2
´
f i +
å
(C L ´
V CC 2
´
f o ) where:
f i = input frequency in MHz
f o = output frequency in MHz
C L = output load capacitance in pF
V CC = supply voltage in V
å
(C L ´
V CC 2
´
f o ) = sum of outputs
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information” .
December 1990
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Philips Semiconductors
Product specification
Hex inverting high-to-low level shifter
74HC4049
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
V C C
positive supply voltage
2, 4, 6, 10, 12, 15
1Y to 6Y
data outputs
3, 5, 7, 9, 11, 14
1A to 6A
data inputs
8
GND
ground (0 V)
13, 16
n.c.
not connected
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
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Philips Semiconductors
Product specification
Hex inverting high-to-low level shifter
74HC4049
Fig.4 Functional diagram.
Fig.5 Input protection for HC4049. Single sided thick
oxide field effect metal gate transistor as input
protection.
Fig.6 Logic diagram (one level shifter).
FUNCTION TABLE
INPUT
OUTPUT
nA
nY
L
H
H
L
Notes
1. H = HIGH voltage level
L = LOW voltage level
December 1990
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Philips Semiconductors
Product specification
Hex inverting high-to-low level shifter
74HC4049
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
MIN. MAX. UNIT
CONDITIONS
V CC
DC supply voltage
-
0.5
+7
V
V IK
DC input voltage range
-
0.5
+16
V
-
I IK
DC input diode current
20
mA
for V I <-
0.5 V
± I OK
DC output diode current
20
mA
for V O <- 0.5 V or V O > V CC +0.5 V
±
I O
DC output source or sink current
- standard outputs
for
-
0.5 V
<
V O <
V CC +0.5 V
25
mA
I CC ;
± I GND
DC V CC or GND current for types
with:
- standard outputs
50
mA
T stg
storage temperature range
-
65
+150
°
C
power dissipation per package
for temperature range:
-
40 to +125
°
C
74HC
P tot
plastic DIL
750
mW
above +70
°
C: derate linearly with 12 mW/K
plastic mini-pack (SO)
400
mW
above +70
°
C: derate linearly with 8 mW/K
RECOMMENDED OPERATING CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT
CONDITIONS
min.
typ.
max.
V CC
DC supply voltage
2.0
5.0
6.0
V
V I
DC input voltage range
GND
-
15
V
T amb
operating ambient temperature range
-
40
+85
°
C
see DC and AC
characteristics
T amb
operating ambient temperature range
-
40
+125
°
C
t r , t f
input rise and fall times
6.0
1000
500
400
650
1000
ns
V CC = 2.0 V; V IN = 2.0 V
V CC = 4.5 V; V IN = 4.5 V
V CC = 6.0 V; V IN = 6.0 V
V CC = 6.0 V; V IN = 10.0 V
V CC = 6.0 V; V IN = 15.0 V
December 1990
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±
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