74HC_T541.pdf

(48 KB) Pobierz
Octal buffer/line driver; 3-state
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
·
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT541
Octal buffer/line driver; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
21702220.005.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT541
FEATURES
The 74HC/HCT541 are octal non-inverting buffer/line
drivers with 3-state outputs. The 3-sta te o utputs are
controlled b y th e output enable inputs OE 1 and OE 2 .
A HIGH on OE n causes the outputs to assume a high
impedance OFF-state.
The “541” is identical to the “540” but has non-inverting
outputs.
·
Non-inverting outputs
·
Output capability: bus driver
·
I CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT541 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T amb = 25
°
C; t r = t f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t PHL / t PLH
propagation delay A n to Y n
C L = 15 pF; V CC = 5 V
10
12
ns
C I
input capacitance
3.5
3.5
pF
C PD
power dissipation capacitance per buffer notes 1 and 2
37
39
pF
Notes
1. C PD is used to determine the dynamic power dissipation (P D in
m
W):
P D = C PD ´
V CC 2
´
f i
(C L ´
V CC 2
´
f o ) where:
f o ) = sum of outputs
C L = output load capacitance in pF
V CC = supply voltage in V
2. For HC the condition is V I = GND to V CC
For HCT the condition is V I = GND to V CC - 1.5 V
f i = input frequency in MHz
f o = output frequency in MHz
å
(C L ´
V CC 2
´
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information” .
December 1990
2
21702220.006.png 21702220.007.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT541
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 19
OE 1 , OE 2
output enable input (active LOW)
2, 3, 4, 5, 6, 7, 8, 9
A 0 to A 7
data inputs
10
GND
ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11
Y 0 to Y 7
bus outputs
20
V CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
21702220.008.png 21702220.001.png 21702220.002.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT541
FUNCTION TABLE
INPUTS
OUTPUT
OE 1
OE 2
A n
Y n
L
L
X
H
L
L
H
X
L
H
X
X
L
H
Z
Z
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
4
21702220.003.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT541
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” .
Output capability: bus driver
I CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t r = t f = 6 ns; C L = 50 pF
T amb (
°
C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
+
25
-
40 to
+
85
-
40 to
+
125
V CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t PHL / t PLH propagation delay
A n to Y n
33
12
10
115
23
20
145
29
25
175
35
30
ns
2.0
4.5
6.0
Fig.6
t PZH / t PZL 3-state output
e nab le time
OE to Y n
55
20
16
160
32
27
200
40
34
240
48
41
ns
2.0
4.5
6.0
Fig.7
t PHZ / t PLZ 3-state output
d isab le time
OE to Y n
61
22
18
160
32
27
200
40
34
240
48
41
ns
2.0
4.5
6.0
Fig.7
t THL / t TLH output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.6
December 1990
5
21702220.004.png
Zgłoś jeśli naruszono regulamin