icl7117.pdf

(140 KB) Pobierz
ICL7116, ICL7117
ICL7116, ICL7117
January 1998
3 1 / 2 Digit, LCD/LED Display,
A/D Converter with Display Hold
Features
• HOLD Reading Input Allows Indefinite Display Hold
• Guaranteed Zero Reading for 0V Input
• True Polarity at Zero for Precise Null Detection
• 1pA Typical Input Current
• Direct Display Drive
- LCD ICL7116
- LED lCL7117
• Low Noise - Less Than 15 m V P-P (Typ)
• On Chip Clock and Reference
• Low Power Dissipation - Typically Less Than 10mW
• No Additional Active Circuits Required
• Surface Mount Package Available
Description
The Intersil ICL7116 and ICL7117 are high performance, low
power, 3 1 / 2 digit, A/D converters. Included are seven segment
decoders, display drivers, a reference, and a clock. The
ICL7116 is designed to interface with a liquid crystal display
(LCD) and includes a multiplexed backplane drive. The
ICL7117 will directly drive an instrument size, light emitting
diode (LED) display.
The ICL7116 and ICL7117 have all of the features of the
ICL7106 and ICL7107 with the addition of a HOLD Reading
input. With this input, it is possible to make a measurement
and retain the value on the display indefinitely. To make room
for this feature the reference low input has been connected
to Common internally rather than being fully differential.
These circuits retain the accuracy, versatility, and true econ-
omy of the ICL7106 and ICL7107. They feature auto-zero to
less than 10 m V, zero drift of less than 1 m V/ o C, input bias cur-
rent of 10pA maximum, and roll over error of less than one
count. The versatility of true differential input is of particular
advantage when measuring load cells, strain gauges and
other bridge-type transducers. And finally, the true economy
of single power supply operation (ICL7116) enables a high
performance panel meter to be built with the addition of only
eleven passive components and a display.
Ordering Information
PART NUMBER
TEMP.
RANGE ( o C)
PACKAGE
PKG. NO.
ICL7116CPL
0 to 70
40 Ld PDIP
E40.6
ICL7116CM44
0 to 70
44 Ld MQFP
Q44.10x10
ICL7117CPL
0 to 70
40 Ld PDIP
E40.6
Pinouts
ICL7116, ICL7117 (PDIP)
TOP VIEW
ICL7116 (MQFP)
TOP VIEW
HLDR
D1
C1
B1
A1
F1
G1
E1
D2
C2
B2
A2
F2
E2
D3
B3
F3
E3
(1000) AB4
POL
1
2
3
4
5
6
7
8
9
10
11
12
40
39
38
37
36
35
34
33
32
31
30
29
OSC 1
OSC 2
OSC 3
TEST
REF HI
V+
C REF +
C REF -
COMMON
IN HI
IN LO
A-Z
BUFF
INT
V-
G2 (10’s)
C3
A3
G3
BP/GND
NC
1
2
3
4
5
6
7
8
9
10
1 12 13 14 15 16 17
39 38 37 36 35 34
33
32
31
30
29
NC
G2
C3
A3
G3
NC
TEST
OSC 3
NC
(10’s)
OSC 2
28
27
26
25
24
23
22
BP
OSC 1
HLDR
D1
C1
B1
POL
13
28
14
15
16
17
18
19
20
27
26
25
24
23
22
21
AB4
E3
F3
(100’s)
18
19
20
21
B3
(100’s)
(MINUS)
A1 F1 G1 E1 D2 C2
B2 A2 F2 E2 D3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
File Number 3083.2
1
(1’s)
44 43 42 41 40
214290908.031.png 214290908.032.png 214290908.033.png 214290908.034.png 214290908.001.png 214290908.002.png
ICL7116, ICL7117
Absolute Maximum Ratings
Thermal Information
Supply Voltage
ICL7116, V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
ICL7117, V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
ICL7117, V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-9V
Analog Input Voltage (Either Input) (Note 1). . . . . . . . . . . . . V+ to V-
Reference Input Voltage (Either Input) . . . . . . . . . . . . . . . . . V+ to V-
Clock Input
ICL7116 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TEST to V+
ICL7117 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V+
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 o C to 70 o C
q JA ( o C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 o C
Maximum Storage Temperature Range . . . . . . . . . .-65 o C to 150 o C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 o C
(MQFP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Input voltages may exceed the supply voltages provided the input current is limited to ± 100 m A.
2.
Electrical Specifications (Note 3) T A = 25 o C, f CLOCK = 48kHz, V REF = 100mV
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SYSTEM PERFORMANCE
Zero Input Reading
V IN = 0V, Full Scale = 200mV
-000.0
±
000.0 +000.0 Digital
Reading
Ratiometric Reading
V lN = V REF , V REF = 100mV
999
999/
1000
1000
Digital
Reading
Rollover Error
195mV Difference in Reading for Equal
Positive and Negative Inputs Near Full Scale
-
±
0.2
±
1
Counts
Linearity
Full Scale = 200mV or Full Scale = 2V Maximum
Deviation from Best Straight Line Fit (Note 5)
-
± 0.2
± 1
Counts
Common Mode Rejection Ratio
V CM = ± 1V, V IN = 0V, Full Scale = 200mV (Note 5)
-
50
-
m V/V
Noise
V IN = 0V, Full Scale = 200mV (Peak-To-Peak Value
Not Exceeded 95% of Time) (Note 5)
-
15
-
m
Leakage Current Input
V lN = 0 (Note 5)
-
1
10
pA
Zero Reading Drift
V lN = 0, 0 o C To 70 o C (Note 5)
-
0.2
1
m
V/ o C
Scale Factor Temperature Coefficient
V IN = 199mV, 0 o C To 70 o C (Note 5)
-
1
5
ppm/ o C
V+ Supply Current
V IN = 0 (Does Not Include LED Current for ICL7117)
-
1.0
1.8
mA
V- Supply Current
ICL7117 Only
-
0.6
1.8
mA
COMMON Pin Analog Common Voltage
25k W Between Common and Positive Supply (With
Respect to + Supply)
2.4
3.0
3.2
V
Temperature Coefficient of Analog Common 25k
Between Common and Positive Supply (With
Respect to + Supply) (Note 5)
W
-
80
-
ppm/ o C
DISPLAY DRIVER (ICL7116 ONLY)
Peak-To-Peak Segment Drive Voltage
Peak-To-Peak Backplane Drive Voltage
V+ = to V- = 9V, (Note 4)
4
5.5
6
V
DISPLAY DRIVER (ICL7117 ONLY)
Segment Sinking Current
V+ = 5V, Segment Voltage = 3V
(Except Pins 19 and 20)
5
8
-
mA
Pin 19 Only
10
16
-
mA
Pin 20 Only
4
7
-
mA
NOTES:
3. Unless otherwise noted, specifications apply to both the ICL7116 and ICL7117. ICL7116 is tested in the circuit of Figure 1. ICL7117 is
tested in the circuit of Figure 2.
4. Back plane drive is in phase with segment drive for ‘off’ segment, 180 degrees out of phase for ‘on’ segment. Frequency is 20 times con-
version rate. Average DC component is less than 50mV.
5. Not tested, guaranteed by design.
2
Thermal Resistance (Typical, Note 2)
q JA is measured with the component mounted on an evaluation PC board in free air.
-V IN = +V lN @
V
214290908.003.png 214290908.004.png 214290908.005.png 214290908.006.png
ICL7116, ICL7117
Typical Applications and Test Circuits
+ -
IN
9V
C 1 = 0.1 m F
C 2 = 0.47 m F
C 3 = 22
R 1
R 5
F
C 4 = 100pF
C 5 = 0.01 m F
R 1 = 24k
R 3
C 4
R 4
C 5
C 2
R 2
C 3
W
C 1
DISPLAY
W
R 3 = 100k W
R 4 = 1k
W
R 5 = 1M
W
ICL7116
DISPLAY
FIGURE 1. ICL7116 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 200mV
FULL SCALE
C 1 = 0.1
m
F
C 2 = 0.47
m
F
+ -
IN
R 6
C 3 = 22 m F
C 4 = 100pF
C 5 = 0.01
+5V
-5V
TO
DECIMAL
POINT
R 5
m
F
R 1
R 1 = 24k W
R 2 = 47k W
R 3 = 100k
TP 5
TP 1 TP 2
TP 3
W
R 3
C 4
R 4
C 5
C 2
R 2
C 3
R 4 = 1k W
R 5 = 1M W
R 6 = 150 W
DISPLAY
C 1
TP 4
ICL7117
DISPLAY
FIGURE 2. ICL7117 TEST CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS SELECTED FOR 200mV
FULL SCALE
3
m
R 2 = 47k
214290908.007.png 214290908.008.png 214290908.009.png 214290908.010.png 214290908.011.png 214290908.012.png 214290908.013.png 214290908.014.png 214290908.015.png 214290908.016.png 214290908.017.png 214290908.018.png 214290908.019.png 214290908.020.png 214290908.021.png 214290908.022.png 214290908.023.png 214290908.024.png 214290908.025.png
ICL7116, ICL7117
Design Information Summary Sheet
• OSCILLATOR FREQUENCY
f OSC = 0.45/RC
C OSC > 50pF; R OSC > 50k W
f OSC (Typ) = 48kHz
• OSCILLATOR PERIOD
t OSC = RC/0.45
• INTEGRATION CLOCK FREQUENCY
f CLOCK = f OSC /4
• INTEGRATION PERIOD
t INT = 1000 x (4/f OSC )
• 60/50Hz REJECTION CRITERION
t INT /t 60Hz or t lNT /t 50Hz = Integer
• OPTIMUM INTEGRATION CURRENT
I INT = 4 m A
• FULL SCALE ANALOG INPUT VOLTAGE
V lNFS (Typ) = 200mV or 2V
• INTEGRATE RESISTOR
• DISPLAY COUNT
COUNT 1000
´
V IN
V REF
• CONVERSION CYCLE
t CYC = t CL0CK x 4000
t CYC = t OSC x 16,000
when f OSC = 48KHz; t CYC = 333ms
• COMMON MODE INPUT VOLTAGE
(V- + 1V) < V lN < (V+ - 0.5V)
• AUTO-ZERO CAPACITOR
0.01 m F < C AZ < 1 m F
• REFERENCE CAPACITOR
0.1 m F < C REF < 1 m F
•V COM
Biased between V+ and V-.
•V COM @ V+ - 2.8V
Regulation lost when V+ to V- < @ 6.8V.
If V COM is externally pulled down to (V + to V -)/2,
the V COM circuit will turn off.
• ICL7116 POWER SUPPLY: SINGLE 9V
V+ - V- = 9V
Digital supply is generated internally
V TEST @ V+ - 4.5V
• ICL7116 DISPLAY: LCD
Type: Direct drive with digital logic supply amplitude.
• ICL7117 POWER SUPPLY: DUAL ± 5.0V
V+ = +5V to GND
V- = -5V to GND
Digital Logic and LED driver supply V+ to GND
• ICL7117 DISPLAY: LED
Type: Non-Multiplexed Common Anode
R INT
=
V INFS
I INT
• INTEGRATE CAPACITOR
(
t INT
)
(
I INT
)
C INT
=
--------------------------------
V INT
• INTEGRATOR OUTPUT VOLTAGE SWING
(
t INT
)
(
I INT
)
V INT
=
--------------------------------
C INT
•V INT MAXIMUM SWING:
(V- + 1.0V) < V INT < (V+ - 0.5V), V INT (Typ) = 2V
Typical Integrator Amplifier Output Waveform (INT Pin)
AUTO ZERO PHASE
(COUNTS)
2999 - 1000
SIGNAL INTEGRATE
PHASE FIXED
1000 COUNTS
DE-INTEGRATE PHASE
0 - 1999 COUNTS
TOTAL CONVERSION TIME = 4000 x t CLOCK = 16,000 x t OSC
4
=
---------------
-----------------
214290908.026.png
ICL7116, ICL7117
Pin Descriptions
PIN NUMBER
40 PIN DIP
44 PIN
FLATPACK
NAME
FUNCTION
DESCRIPTION
1
8
HLDR
Input
Display Hold Control.
2
9
D1
Output
Driver Pin for Segment “D” of the display units digit.
3
10
C1
Output
Driver Pin for Segment “C” of the display units digit.
4
11
B1
Output
Driver Pin for Segment “B” of the display units digit.
5
12
A1
Output
Driver Pin for Segment “A” of the display units digit.
6
13
F1
Output
Driver Pin for Segment “F” of the display units digit.
7
14
G1
Output
Driver Pin for Segment “G” of the display units digit.
8
15
E1
Output
Driver Pin for Segment “E” of the display units digit.
9
16
D2
Output
Driver Pin for Segment “D” of the display tens digit.
10
17
C2
Output
Driver Pin for Segment “C” of the display tens digit.
11
18
B2
Output
Driver Pin for Segment “B” of the display tens digit.
12
19
A2
Output
Driver Pin for Segment “A” of the display tens digit.
13
20
F2
Output
Driver Pin for Segment “F” of the display tens digit.
14
21
E2
Output
Driver Pin for Segment “E” of the display tens digit.
15
22
D3
Output
Driver pin for segment “D” of the display hundreds digit.
16
23
B3
Output
Driver pin for segment “B” of the display hundreds digit.
17
24
F3
Output
Driver pin for segment “F” of the display hundreds digit.
18
25
E3
Output
Driver pin for segment “E” of the display hundreds digit.
19
26
AB4
Output
Driver pin for both “A” and “B” segments of the display thousands digit.
20
27
POL
Output
Driver pin for the negative sign of the display.
21
28
BP/GND
Output
Driver pin for the LCD backplane/Power Supply Ground.
22
29
G3
Output
Driver pin for segment “G” of the display hundreds digit.
23
30
A3
Output
Driver pin for segment “A” of the display hundreds digit.
24
31
C3
Output
Driver pin for segment “C” of the display hundreds digit.
25
32
G2
Output
Driver pin for segment “G” of the display tens digit.
26
34
V-
Supply
Negative power supply.
27
35
INT
Output
Integrator amplifier output. To be connected to integrating capacitor.
28
36
BUFF
Output
Input buffer amplifier output. To be connected to integrating resistor.
29
37
A-Z
Input
Integrator amplifier input. To be connected to auto-zero capacitor.
30
31
38
39
IN LO
IN HI
Input
Differential inputs. To be connected to input voltage to be measured. LO and HI
designators are for reference and do not imply that LO should be connected to
lower potential, e.g., for negative inputs IN LO has a higher potential than IN HI.
32
40
COMMON
Supply/
Output
Internal voltage reference output.
33
34
41
42
C REF -
C REF +
Connection pins for reference capacitor.
35
36
43
44
V+
REF HI
Supply
Power Supply.
37
3
TEST
Input
Display test. Turns on all segments when tied to V+.
38
39
40
4
6
7
OSC3
OSC2
OSC1
Output
Output
Input
Device clock generator circuit connection pins.
5
214290908.027.png 214290908.028.png 214290908.029.png 214290908.030.png

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin