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2A SWITCHING REGULATOR
L4972A
L4972AD
. 2A OUTPUT CURRENT
2A SWITCHING REGULATOR
. 5.1V TO 40V OUTPUT VOLTAGE RANGE
MULTIPOWER BCD TECHNOLOGY
. INTERNAL CURRENT LIMITING
. PRECISE 5.1V ± 2% ON CHIP REFERENCE
. RESET AND POWER FAIL FUNCTIONS
. INPUT/OUTPUT SYNC PIN
. UNDER VOLTAGE LOCK OUT WITH HYS-
. PWM LATCH FOR SINGLE PULSE PER PE-
TERETIC TURN-ON
. VERY HIGH EFFICIENCY
. SWITCHING FREQUENCY UP TO 200KHz
POWERDIP
(16 + 2 + 2)
SO20
. THERMAL SHUTDOWN
. CONTINUOUS MODE OPERATION
ORDERING NUMBERS : L4972A (Powerdip)
L4972AD (SO20)
DESCRIPTION
The L4972A is a stepdown monolithic power switch-
ing regulator delivering 2A at a voltage variable from
5.1 to 40V.
Realized with BCD mixed technology, the device
uses a DMOS output transistor to obtain very high
efficiency and very fast switching times. Features of
the L4972A include reset and power fail for micro-
processors, feed forward line regulation, soft start,
limiting current and thermal protection. The device
is mounted in a Powerdip 16 + 2 + 2 and SO20 large
plastic packages and requires few external compo-
nents. Efficient operation at switching frequencies
up to 200KHz allows reduction in the size and cost
of external filter component.
BLOCK DIAGRAM
January 1995
1/23
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
. 0 TO 90% DUTY CYCLE RANGE
. INTERNAL FEED-FORWARD LINE REG.
RIOD
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L4972A-L4972AD
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V 11
Input Voltage
55
V
V 11
Input Operating Voltage
50
V
V 20
Output DC Voltage
Output Peak Voltage at t = 0.1
-1
-5
V
V
m
s f = 200khz
I 20
Maximum Output Current
Internally Limited
V I
Boostrap Voltage
Boostrap Operating Voltage
65
V 11 +15
V
V
V 4 ,V 8
Input Voltage at Pins 4, 12
12
V
V 3
Reset Output Voltage
50
V
I 3
Reset Output Sink Current
50
mA
V 2 ,V 7 ,V 9 ,V 10 Input Voltage at Pin 2, 7, 9, 10
7
V
I 2
Reset Delay Sink Current
30
mA
I 7
Error Amplifier Output Sink Current
1
A
I 8
Soft Start Sink Current
30
mA
P tot
Total Power Dissipation at T PINS
3
90
°
C
5 / 3.75(*)
1.3/1 (*)
W
W
at T amb =70
C (No copper area on PCB)
T J ,T stg
Junction and Storage Temperature
-40 to 150
C
(*) SO-20
PIN CONNECTION (top view)
THERMAL DATA
Symbol
Parameter
Powerdip
SO-20
R th j-pins
R th j-amb
Thermal Resistance Junction-Pins
max
12
°
C/W
16
°
C/W
Thermal Resistance Junction-ambient
max
60
°
C/W
80
°
C/W
2/23
°
°
11016460.003.png
L4972A-L4972AD
PIN FUNCTIONS
N o
Name
Function
1
BOOTSTRAP
A C boot capacitor connected between this terminal and the output allows to drive
properly the internal D-MOS transistor.
2
RESET DELAY
A C d capacitor connected between this terminal and ground determines the reset
signal delay time.
3
RESET OUT
Open Collector Reset/power Fail Signal Output. This output is high when the supply
and the output voltages are safe.
4
RESET INPUT
Input of Power Fail Circuit. The threshold is 5.1V. It may be connected via a divider
to the input for power fail function. It must be connected to the pin 14 an external 30K
W
resistor when power fail signal not required.
5, 6
15, 16
GROUND
Common Ground Terminal
7
FREQUENCY
COMPENSATION
A series RC network connected between this terminal and ground determines the
regulation loop gain characteristics.
8
SOFT START
Soft Start Time Constant. A capacitor is connected between thi sterminal and ground
to define the soft start time constant.
9
FEEDBACK INPUT
The Feedback Terminal of the Regulation Loop. The output is connected directly to
this terminal for 5.1V operation; It is connected via a divider for higher voltages.
10
SYNC INPUT
Multiple L4972A’s are synchronized by connecting pin 10 inputs together or via an
external syncr. pulse.
11
SUPPLY VOLTAGE
Unregulated Input Voltage.
12, 19 N.C.
Not Connected.
13
V ref
5.1V V ref Device Reference Voltage.
14
V start
Internal Start-up Circuit to Drive the Power Stage.
17
OSCILLATOR
R osc . External resistor connected to ground determines the constant charging current
of C osc .
18
OSCILLATOR
C osc . External capacitor connected to ground determines (with R osc ) the switching
frequency.
20
OUTPUT
Regulator Output.
3/23
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L4972A-L4972AD
CIRCUIT OPERATION
The L4972A is a 2A monolithic stepdown switching
regulator working in continuousmode realized in the
new BCD Technology. This technology allows the
integration of isolated vertical DMOS power transi-
stors plus mixed CMOS/Bipolar transistors.
The device can deliver 2A at an output voltage ad-
justable from 5.1V to 40V and contains diagnostic
and control functions that make it particularly suita-
ble for microprocessor based systems.
an external RC network connected to the output of
the error amplifier. A voltage feedforward control
has been added to the oscillator, this maintains su-
perior line regulation over a wide input voltage ran-
ge. Closing the loop directly gives an output vol-tage
of 5.1V, higher voltages are obtained by inserting a
voltage divider.
At turn on, output overcurrents are preventedby the
soft start function (fig. 2). The error amplifier is in-
itially clamped by an externalcapacitor, Css, and al-
lowed to rise linearly under the charge of an internal
constant current source.
Output overload protection is provided by a current
limit circuit. The load current is sensed by a internal
metal resistor connectedto a comparator.When the
load current exceeds a preset threshold, the output
of the comparator sets a flip flop which turns off the
power DMOS. The next clock pulse, from an internal
40kHz oscillator, will reset the flip flop and the power
DMOS will again conduct. This current protection
method, ensuresa constant current output when the
system is overloaded or short circuited and limits the
switching frequency, in this condition, to 40kHz. The
Reset and Power fail circuit (fig. 4), generates an
output signal when the supply voltage exceeds a
threshold programmed by an external voltage di-
vider. The reset signal, is generated with a delay
time programmed by a external capacitor on the de-
lay pin. When the supply voltage falls below the
threshold or the output voltage goes below 5V, the
reset output goes low immediately. The reset output
is an open drain.
Fig. 4A shows the case when the supply voltage is
higher than the threshold, but the output voltage is
not yet 5V.
Fig. 4B shows the case when the output is 5.1V, but
the supply voltage is not yet higher than the fixed
threshold.
The thermal protection disables circuit operation
when the junction temperature reaches about
150 ° C and has a hysterysis to prevent unstable
conditions.
2%, soft start, undervoltage lockout, oscillator with
feedforward control, pulse by pulse current limit,
thermal shutdown and finally the reset and power
fail circuit. The reset and power fail circuit provides
an output signal for a microprocessor indicating the
status of the system.
Device turn on is around 11V with a typical 1V hy-
sterysis, this thresholdporvides a correct voltage for
the driving stage of the DMOS gate and the hyste-
rysis prevents instabilities.
An external bootstrap capacitor charge to 12V by an
internal voltage reference is needed to provide cor-
rect gate drive to the power DMOS. The driving cir-
cuit is able to source and sink peak currents of
around 0.5A to the gate of the DMOS transistor. A
typical switching time of the current in the DMOS
transistor is 50ns. Due to the fast commutation swit-
ching frequencies up to 200kHz are possible.
The PWM control loop consists of a sawtooth oscil-
lator, error amplifier, comparator, latch and the out-
put stage. An error signal is produced by comparing
the output voltage with the precise5.1V ± 2% on chip
reference. This error signal is then compared with
the sawtooth oscillator in order to generate frixed
frequency pulse width modulated drive for the out-
put stage. A PWM latch is included to eliminate mul-
tiple pulsing within a period even in noisy
environments.
The gain and stability of the loop can be adjusted by
4/23
BLOCK DIAGRAM
The block diagram shows the DMOS power tran-
sistors and the PWM control loop. Integrated fun-
ctions include a reference voltage trimmed to 5.1V
±
11016460.005.png
L4972A-L4972AD
Figure 1 : Feedforward Waveform.
Figure 2 : Soft Start Function.
Figure 3 : Limiting Current Function.
5/23
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