HIP6003.PDF

HIP6003

Data Sheet

March 2000

File Number 4274.2

Buck Pulse-Width Modulator (PWM)

Controller and Output Voltage Monitor

The HIP6003 provides complete control and protection for a

DC-DC converter optimized for high-performance

microprocessor applications. It is designed to drive an

N-Channel MOSFET in a standard buck topology. The

HIP6003 integrates all of the control, output adjustment,

monitoring and protection functions into a single package.

Features

• Drives N-Channel MOSFET

• Operates From +5V or +12V Input

• Simple Single-Loop Control Design

- Voltage-Mode PWM Control

• Fast Transient Response

- High-Bandwidth Error Ampliﬁer

- Full 0% to 100% Duty Ratio

The output voltage of the converter is easily adjusted and

precisely regulated. The HIP6003 includes a 4-Input

Digital-to-Analog Converter (DAC) that adjusts the output

voltage from 2.0VDC to 3.5VDC in 0.1V increments. The

precision reference and voltage-mode regulator hold the

selected output voltage to within ±

• Excellent Output Voltage Regulation

1% over temperature and

• 4-Bit Digital-to-Analog Output Voltage Selection

- Wide Range . . . . . . . . . . . . . . . . . . .2.0VDC to 3.5VDC

- 0.1V Binary Steps

line voltage variations.

The HIP6003 provides simple, single feedback loop, voltage-

mode control with fast transient response. It includes a

200kHz free-running triangle-wave oscillator that is

adjustable from below 50kHz to over 1MHz. The error

ampliﬁer features a 15MHz gain-bandwidth product and

6V/ms slew rate which enables high converter bandwidth for

fast transient performance. The resulting PWM duty ratio

ranges from 0% to 100%.

• Power-Good Output Voltage Monitor

• Over-Voltage and Over-Current Fault Monitors

- Does Not Require Extra Current Sensing Element

- Uses MOSFETs r DS(ON)

• Small Converter Size

- Constant Frequency Operation

- 200kHz Free-Running Oscillator Programmable from

50kHz to over 1MHz

The HIP6003 monitors the output voltage with a window

comparator that tracks the DAC output and issues a Power

Good signal when the output is within ± 10%. The HIP6003

protects against over-current conditions by inhibiting PWM

operation. Built-in over-voltage protection triggers an

external SCR to crowbar the input supply. The HIP6003

monitors the current by using the r DS(ON) of the upper

MOSFET which eliminates the need for a current sensing

resistor.

Applications

• Power Supply for Pentium®, Pentium Pro, PowerPC™ and

Alpha™ Microprocessors

• High-Power 5V to 3.xV DC-DC Regulators

• Low-Voltage Distributed Power Supplies

Pinout

Ordering Information

HIP6003

(SOIC)

TOP VIEW

PART NUMBER

TEMP.

RANGE ( o C)

PACKAGE

PKG.

NO.

HIP6003CB

0 to 70

16 Ld SOIC

M16.15

OCSET

VID0

VID1

VID2

VID3

VSEN

RT/OVP

VCC

BOOT

UGATE

PHASE

PGOOD

GND

COMP

Alpha Micro™ is a trademark of Digital Computer Equipment Corporation.

Pentium® is a registered trademark of Intel Corporation.

PowerPC™ is a registered trademark of IBM.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

± 1% Over Line Voltage and Temperature

HIP6003

Typical Application

+12V

VCC

V IN = +5V OR +12V

PGOOD

OCSET

MONITOR AND

PROTECTION

RT/OVP

BOOT

OSC

UGATE

VID0

VID1

VID2

VID3

HIP6003

PHASE

D/A

+V O UT

COMP

VSEN

GND

Block Diagram

VCC

VSEN

110%

POWER-ON

RESET (POR)

PGOOD

90%

115%

OVER-

VOLTAGE

SOFT-

START

OCSET

OVER-

CURRENT

BOOT

UGATE

REFERENCE

200 µ

PHASE

VID0

VID1

VID2

VID3

D/A

CONVERTER

(DAC)

DACOUT

PWM

COMPARATOR

GATE

CONTROL

LOGIC

INHIBIT

PWM

ERROR

AMP

GND

COMP

OSCILLATOR

RT/OVP

HIP6003

Absolute Maximum Ratings

Thermal Information

Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15.0V

Boot Voltage, V BOOT - V PHASE . . . . . . . . . . . . . . . . . . . . . . . +15.0V

Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC + 0.3V

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2

θ JA ( o C/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Maximum Junction Temperature (Plastic Package) . . . . . . . .150 o C

Maximum Storage Temperature Range . . . . . . . . . . -65 o C to 150 o C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 o C

(SOIC - Lead Tips Only)

Operating Conditions

Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ± 10%

Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . 0 o C to 70 o C

Junction Temperature Range . . . . . . . . . . . . . . . . . . . . 0 o C to 125 o C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.

Electrical Speciﬁcations Recommended Operating Conditions, unless otherwise noted.

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

VCC SUPPLY CURRENT

Nominal Supply

I CC

UGATE Open

POWER-ON RESET

Rising VCC Threshold

V OCSET = 4.5V

10.4

Falling VCC Threshold

V OCSET = 4.5V

8.2

Rising V OCSET Threshold

1.26

OSCILLATOR

Free Running Frequency

RT = OPEN

185

200

215

kHz

Total Variation

6k Ω

< RT to GND < 200k Ω

-15

+15

Ramp Amplitude

V OSC

RT = OPEN

1.9

V P-P

REFERENCE AND DAC

DACOUT Voltage Accuracy

-1.0

+1.0

ERROR AMPLIFIER

DC Gain

Gain-Bandwidth Product

GBW

MHz

Slew Rate

COMP = 10pF

GATE DRIVER

Upper Gate Source

I UGATE

V BOOT - V PHASE = 12V, V UGATE = 6V

350

500

Upper Gate Sink

R UGATE

5.5

PROTECTION

Over-Voltage Trip (V SEN /DACOUT)

115

120

OCSET Current Source

I OCSET

V OCSET = 4.5VDC

170

200

230

OVP Sourcing Current

I OVP

V SEN = 5.5V; V OVP = 0V

Soft Start Current

I SS

POWER GOOD

Upper Threshold (V SEN /DACOUT)

V SEN Rising

106

111

Lower Threshold (V SEN /DACOUT)

V SEN Falling

Hysteresis (V SEN /DACOUT)

Upper and Lower Threshold

PGOOD Voltage Low

V PGOOD I PGOOD = -5mA

0.5

Thermal Resistance (Typical, Note 1)

NOTE:

HIP6003

Typical Performance Curves

1000

R T PULLUP

TO +12V

C UGATE = 3300pF

R T PULLDOWN

TO V SS

100

C UGATE = 1000pF

C UGATE = 10pF

100

1000

100 200 300 400 500 600 700 800 900 1000

SWITCHING FREQUENCY (kHz)

FIGURE 1. R T RESISTANCE vs FREQUENCY

FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY

Functional Pin Description

OCSET

VID0

VID1

VID2

VID3

VSEN

COMP (Pin 7) and FB (Pin 8)

COMP and FB are the available external pins of the error

ampliﬁer. The FB pin is the inverting input of the error

ampliﬁer and the COMP pin is the error ampliﬁer output.

These pins are used to compensate the voltage-control

feedback loop of the converter.

RT/OVP

VCC

BOOT

UGATE

PHASE

PGOOD

GND

GND (Pin 9)

Signal ground for the IC. All voltage levels are measured with

respect to this pin.

COMP

OCSET (Pin 1)

Connect a resistor (R OCSET ) from this pin to the drain of the

upper MOSFET. R OCSET , an internal 200 µ A current source

(I OCS ), and the upper MOSFET on-resistance. (r DS(ON) ) set

the converter over-current (OC) trip point according to the

following equation:

PGOOD (Pin 10)

PGOOD is an open collector output used to indicate the

status of the converter output voltage. This pin is pulled low

when the converter output is not within ±

10 %

of the

DACOUT reference voltage.

PHASE (Pin 11)

Connect the PHASE pin to the upper MOSFET source. This

pin is used to monitor the voltage drop across the MOSFET

for over-current protection. This pin also provides the return

path for the upper gate drive.

I PEAK =

--------------------------------------------

•

r DS ON

R OCSET

An over-current trip cycles the soft-start function.

UGATE (Pin 12)

Connect UGATE to the upper MOSFET gate. This pin

provides the gate drive for the upper MOSFET.

SS (Pin 2)

Connect a capacitor from this pin to ground. This capacitor,

along with an internal 10 µ A current source, sets the soft-

start interval of the converter.

BOOT (Pin 13)

This pin provides bias voltage to the upper MOSFET driver.

A bootstrap circuit may be used to create a BOOT voltage

suitable to drive a standard N-Channel MOSFET.

VID0-3 (Pins 3-6)

VID0-3 are the input pins to the 4-bit DAC. The states of

these four pins program the internal voltage reference

(DACOUT). The level of DACOUT sets the converter output

voltage. It also sets the PGOOD and OVP thresholds. Table

1 speciﬁes DACOUT for the 16 combinations of DAC inputs.

VCC (Pin 14)

Provide a 12V bias supply for the chip to this pin.

I OCS

HIP6003

RT/OVP (Pin 15)

This pin is multiplexed, providing two functions. The ﬁrst

function is oscillator switching frequency adjustment. By

placing a resistor (R T ) from this pin to GND, the nominal

200KHz switching frequency is increased according to the

following equation:

SS voltage exceeds the DACOUT voltage and the output

voltage is in regulation. This method provides a rapid and

controlled output voltage rise. The PGOOD signal toggles

‘high’ when the output voltage (VSEN pin) is within ± 5% of

DACOUT. The 2% hysteresis built into the power good

comparators prevents PGOOD oscillation due to nominal

output voltage ripple.

510 6

F S

200kHz

---------------------

R T

to GND

Ω( )

Conversely, connecting a pull-up resistor (R T ) from this pin

to V CC reduces the switching frequency according to the

following equation:

PGOOD

(2V/DIV)

F S

200kHz

410 7

R T

to 12V

SOFT-START

(1V/DIV)

Ω( )

The second function for this pin is to drive an external SCR

in the event of an overvoltage condition.

VOLTAGE

(1V/DIV)

VSEN (Pin 16)

This pin is connected to the converters output voltage. The

PGOOD and OVP comparator circuits use this signal to

report output voltage status and for overvoltage protection.

t 1

t 2

t 3

TIME (5ms/DIV)

FIGURE 3. SOFT START INTERVAL

Functional Description

Initialization

The HIP6003 automatically initializes upon receipt of power.

Special sequencing of the input supplies is not necessary.

The Power-On Reset (POR) function continually monitors

the input supply voltages. The POR monitors the bias

voltage at the VCC pin and the input voltage (V IN ) on the

OCSET pin. The level on OCSET is equal to V IN less a ﬁxed

voltage drop (see over-current protection). The POR function

initiates soft start operation after both input supply voltages

exceed their POR thresholds. For operation with a single

+12V power source, V IN and V CC are equivalent and the

+12V power source must exceed the rising V CC threshold

before POR initiates operation.

Over-Current Protection

The over-current function protects the converter from a

shorted output by using the upper MOSFETs on-resistance,

r DS(ON) to monitor the current. This method enhances the

converter’s efﬁciency and reduces cost by eliminating a

current sensing resistor.

The over-current function cycles the soft-start function in a

hiccup mode to provide fault protection. A resistor (R OCSET )

programs the over-current trip level. An internal 200 µ A current

sink develops a voltage across R OCSET that is referenced to

V IN . When the voltage across the upper MOSFET (also

referenced to V IN ) exceeds the voltage across R OCSET , the

over-current function initiates a soft-start sequence. The soft-

start function discharges C SS with a 10 µ A current sink and

inhibits PWM operation. The soft-start function recharges

C SS , and PWM operation resumes with the error amplifier

clamped to the SS voltage. Should an overload occur while

recharging C SS , the soft start function inhibits PWM operation

while fully charging C SS to 4V to complete its cycle. Figure 4

shows this operation with an overload condition. Note that the

inductor current increases to over 15A during the C SS

charging interval and causes an over-current trip. The

A current source charges an external capacitor

(C SS ) on the SS pin to 4V. Soft start clamps the error

ampliﬁer output (COMP pin) and reference input (+ terminal

of error amp) to the SS pin voltage. Figure 3 shows the soft

start interval with C SS = 0.1

F. Initially the clamp on the error

ampliﬁer (COMP pin) controls the converter’s output voltage.

At t1 in Figure 3, the SS voltage reaches the valley of the

oscillator’s triangle wave. The oscillator’s triangular

waveform is compared to the ramping error ampliﬁer voltage.

This generates PHASE pulses of increasing width that

charge the output capacitor(s). This interval of increasing

pulse width continues to t2. With sufﬁcient output voltage,

the clamp on the reference input controls the output voltage.

This is the interval between t2 and t3 in Figure 3. At t3 the

•

R T

•

R T

---------------------

OUTPUT

Soft Start

The POR function initiates the soft start sequence. An

internal 10

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika: