CDX-3183.pdf

(1021 KB) Pobierz
1_01-18_CDX3183_11
CDX-3183
4-4. SCHEMATIC DIAGRAM — CD MECHANISM SECTION — • Refer to page 22 for Waveforms and Note and page 37 for IC Block Diagrams.
(Page 33)
– 25 –
– 26 –
70238836.029.png
CDX-3183
4-6. SCHEMATIC DIAGRAM — DISPLAY SECTION —
(Page 36)
Note:
• All capacitors are in m F unless otherwise noted. pF: mm F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in
and 1 / 4 W or less unless otherwise
• C : panel designation.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
• Voltages are taken with a VOM (Input impedance 10 M
specified.
• U : B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power
supply from ACC and BATT cords.
).
Voltage variations may be noted due to normal production
tolerances.
– 29 –
– 30 –
W
W
70238836.030.png 70238836.031.png
CDX-3183
4-8. SCHEMATIC DIAGRAM — MAIN SECTION (1/2) — • Refer to page 39 for IC Block Diagrams.
(Page 26)
Note:
• All capacitors are in m F unless otherwise noted. pF: mm F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in
W
and 1 / 4 W or less unless otherwise
specified.
• ¢ : internal component.
• C : panel designation.
• U : B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power
supply from ACC and BATT cords.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
( ) : MW
• Voltages are taken with a VOM (Input impedance 10 M W ).
Voltage variations may be noted due to normal production
tolerances.
• Signal path.
F : FM
f : MW
J : CD
– 33 –
– 34 –
70238836.032.png
CDX-3183
4-9. SCHEMATIC DIAGRAM — MAIN SECTION (2/2) — • Refer to page 34 for Note and page 39 for IC Block Diagrams.
(Page 29)
– 35 –
– 36 –
70238836.001.png
• IC Block Diagrams
IC1 CXD2507AQ
64
63
62
61
60
59
58
57
56
55
54
53
52
FOK
1
SERVO AUTO
SEQUENCER
5
51
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
50
MON
MDP
MDS
LOCK
TEST
2
3
4
5
6
SUB CODE
PROCESSOR
49
CPU
INTERFACE
48
14
47
DIGITAL
CLV
4
46
45
44
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
7
8
9
10
11
12
DIGITAL
PLL
EFM
DEMODULATOR
43
42
41
40
3
ASYMMETRY
CORRECTOR
5
13
D/A
INTERFACE
DIGITAL
OUT
39
DOUT
RF
BIAS
ASYI
ASYO
ASYE
14
15
38
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
ERROR
CORRECTOR
16
17
18
6
16K
RAM
37
36
35
3
34
WDCK
19
33
20 21 22 23 24 25 26 27
28
29 30 31 32
IC3 BA6796FP-T1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LEVEL
SHIFT
LEVEL
SHIFT
VCC
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
LEVEL
SHIFT
THERMAL
SHUT
DOWN
LEVEL
SHIFT
LOGIC
V/I
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
CTL1
CTL2
FWD
REV
1
2
3
4
5
6
7
8
9
10
11
12
13
14
– 37 –
70238836.002.png 70238836.003.png 70238836.004.png 70238836.005.png 70238836.006.png 70238836.007.png 70238836.008.png 70238836.009.png 70238836.010.png 70238836.011.png 70238836.012.png 70238836.013.png 70238836.014.png 70238836.015.png 70238836.016.png 70238836.017.png 70238836.018.png 70238836.019.png 70238836.020.png 70238836.021.png 70238836.022.png 70238836.023.png 70238836.024.png 70238836.025.png 70238836.026.png 70238836.027.png 70238836.028.png
 

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin