ATmega163.PDF
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Features
•
High-performance, Low-power AVR
®
8-bit Microcontroller
– 130 Powerful Instructions - Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 8 MIPS Throughput at 8 MHz
– On-chip 2-cycle Multiplier
•
Nonvolatile Program and Data Memories
•
Self-programming In-System Programmable Flash Memory
– 16K Bytes with Optional Boot Block (256 - 2K Bytes)
Endurance: 1,000 Write/Erase Cycles
– Boot Section Allows Reprogramming of Program Code without External
Programmer
– Optional Boot Code Section with Independent Lock Bits
– 512 Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
– 1024 Bytes Internal SRAM
– Programming Lock for Software Security
•
Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
– Real Time Clock with Separate Oscillator and Counter Mode
– Three PWM Channels
– 8-channel, 10-bit ADC
– Byte-oriented 2-wire Serial Interface
– Programmable Serial UART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– Analog Comparator
•
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Four Sleep Modes: Idle, ADC Noise Reduction, Power Save, and Power-Down
•
Power Consumption at 4 MHz, 3.0V, 25
°
C
– Active 5.0 mA
– Idle Mode 1.9 mA
– Power-down Mode < 1 µA
•
I/O and Packages
– 32 Programmable I/O Lines
– 40-pin PDIP and 44-pin TQFP
•
Operating Voltages
– 2.7 - 5.5V (ATmega163L)
– 4.0 - 5.5V (ATmega163)
•
Speed Grades
– 0 - 4 MHz (ATmega163L)
– 0 - 8 MHz (ATmega163)
8-bit
Microcontroller
with 16K Bytes
In-System
Programmable
Flash
ATmega163
ATmega163L
Advance
Information
Rev. 1142B–11/00
1
Pin Configurations
(SDA)
(SCL)
ATmega163(L)
2
ATmega163(L)
Description
The ATmega163 is a low-power CMOS 8-bit microcontroller based on the AVR architecture. By executing powerful instruc-
tions in a single clock cycle, the ATmega163 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
Block Diagram
Figure 1.
Block Diagram
PA0 - PA7
PC0 - PC7
VCC
PORTA DRIVERS
PORTC DRIVERS
GND
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
ANALOG MUX
ADC
OSCILLATOR
AGND
AREF
2-WIRE SERIAL
INTERFACE
XTAL1
INTERNAL
REFERENCE
INTERNAL
OSCILLATOR
OSCILLATOR
XTAL2
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
TIMING AND
CONTROL
RESET
PROGRAM
FLASH
MCU CONTROL
REGISTER
SRAM
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
TIMER/
COUNTERS
X
INTERRUPT
UNIT
INSTRUCTION
DECODER
Y
Z
CONTROL
LINES
EEPROM
ALU
INTERNAL
CALIBRATED
OSCILLATOR
STATUS
REGISTER
PROGRAMMING
LOGIC
SPI
UART
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
PORTB DRIVERS
PORTD DRIVERS
PB0 - PB7
PD0 - PD7
3
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly
connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction
executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times
faster than conventional CISC microcontrollers.
The ATmega163 provides the following features: 16K bytes of In-System Self-Programmable Flash, 512 bytes EEPROM,
1024 bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers, three flexible timer/counters with
compare modes, internal and external interrupts, a byte oriented 2-wire Serial Interface, an 8-channel, 10-bit ADC, a pro-
grammable Watchdog Timer with internal oscillator, a programmable serial UART, an SPI serial port, and four software
selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, timer/counters, SPI port, and
interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the oscillator, dis-
abling all other chip functions until the next interrupt or hardware reset. In Power Save mode, the asynchronous timer
oscillator continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC
Noise Reduction Mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching
noise during ADC conversions.
The on-chip ISP Flash can be programmed through an SPI serial interface or a conventional programmer. By installing a
self-programming boot loader, the microcontroller can be updated within the application without any external components.
The boot program can use any interface to download the application program in the Application Flash memory. By combin-
ing an 8-bit CPU with In-System self-programmable Flash on a monolithic chip, the Atmel ATmega163 is a powerful
microcontroller that provides a highly flexible and cost effective solution to many embedded control applications.
The ATmega163 AVR is supported with a full suite of program and system development tools including: C compilers,
macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.
Pin Descriptions
VCC
Digital supply voltage
GND
Digital ground
Port A (PA7..PA0)
Port A serves as the analog inputs to the A/D Converter.
Port A also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal pull-up
resistors (selected for each bit). The Port A output buffers can sink 20mA and can drive LED displays directly. When pins
PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are acti-
vated. The Port A pins are tristated when a reset condition becomes active, even if the clock is not running.
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers can
sink 20 mA. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. Port
B also serves the functions of various special features of the ATmega83/163 as listed on page 100. The Port B pins are
tristated when a reset condition becomes active, even if the clock is not running.
Port C (PC7..PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers can
sink 20 mA. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The
Port C pins are tristated when a reset condition becomes active, even if the clock is not running.
Port C also serves the functions of various special features of the ATmega163 as listed on page 107.
ATmega163(L)
4
ATmega163(L)
Port D (PD7..PD0)
Port D is an 8-bit bidirectional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers can
sink 20 mA. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. Port
D also serves the functions of various special features of the ATmega163 as listed on page 110. The Port D pins are
tristated when a reset condition becomes active, even if the clock is not running.
RESET
Reset input. A low level on this pin for more than 500 ns will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
AVCC
This is the supply voltage pin for Port A and the A/D Converter. It should be externally connected to VCC, even if the ADC
is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. See page 90 for details on opera-
tion of the ADC.
AREF
This is the analog reference input pin for the A/D Converter. For ADC operations, a voltage in the range 2.5V to AV
CC
can
be applied to this pin.
AGND
Analog ground. If the board has a separate analog ground plane, this pin should be connected to this ground plane. Other-
wise, connect to GND.
Clock Options
The device has the following clock source options, selectable by Flash fuse bits as shown:
Table 1.
Device Clocking Options Select
Device Clocking Option
CKSEL3..0
External Crystal/Ceramic Resonator
1111 - 1010
External Low-frequency Crystal
1001 - 1000
External RC Oscillator
0111 - 0101
Internal RC Oscillator
0100 - 0010
External Clock
0001 - 0000
Note:
“1” means unprogrammed, “0” means programmed.
The various choices for each clocking option give different start-up times as shown in Table 5 on page 22.
Internal RC Oscillator
The internal RC oscillator option is an on-chip oscillator running at a fixed frequency of nominally 1 MHz. If selected, the
device can operate with no external components. The device is shipped with this option selected. See “EEPROM
Read/Write Access” on page 53 for information on calibrating this oscillator.
5
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