54ACQ573.pdf
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Pobierz
August 1998
54ACQ573
•
54ACTQ573
Quiet Series Octal Latch with TRI-STATE
®
Outputs
General Description
The ’ACQ/’ACTQ573 is a high-speed octal latch with buff-
ered commo
n L
atch Enable (LE) and buffered common Out-
put Enable (OE) inputs. The ’ACQ/’ACTQ573 is functionally
identical to the ’ACQ/’ACTQ373 but with inputs and outputs
on opposite sides of the package. The ’ACQ/’ACTQ utilizes
NSC Quiet Series technology to guarantee quiet output
switching and improved dynamic threshold performance.
FACT Quiet Series
™
features GTO
™
output control and un-
dershoot corrector in addition to a split ground bus for supe-
rior performance.
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Improved latch-up immunity
n
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
n
Outputs source/sink 24 mA
n
Faster prop delays than standard ’ACT573
n
4 kV minimum ESD immunity
n
Standard Microcircuit Drawing (SMD)
— ’ACTQ573: 5962-92194
— ’ACQ573: 5962-92180
Features
n
I
CC
and I
OZ
reduced by 50%
Logic Symbols
IEEE/IEC
DS100242-1
DS100242-2
Pin Names
Description
D
0
–D
7
Data Inputs
LE
Latch Enable Input
OE
TRI-STATE Output Enable Input
O
0
–O
7
TRI-STATE Latch Outputs
GTO
™
is a trademark of National Semiconductor Corporation.
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
FACT
®
is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Series
™
is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100242
www.national.com
Connection Diagrams
Functional Description
The ’ACQ/’ACTQ573 contains eight D-type latches with
TRI-STATE output buffers. When the Latch Enable (LE) in-
put is HIGH, data on the D
n
inputs enters the latches. In this
condition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. Th
e T
RI-STATE bu
ffer
s are controlled by the
Output Enable (
OE)
input. When OE is LOW, the buffers are
enabled. When OE is HIGH the buffers are in the high im-
pedance mode but this does not interfere with entering new
data into the latches.
Pin Assignment for DIP
and Flatpak
Truth Table
Inputs
DS100242-3
Outputs
OE
LE
D
O
n
Pin Assignment for LCC
L
H
H
H
L
H
L
L
L
L
X
O
0
H
X
X
Z
H
=
HIGH Voltage
L
=
LOW Voltage
Z
=
High Impedance
X
=
Immaterial
O
0
=
Previous O
0
before HIGH-to-LOW transition of Latch Enable
DS100242-4
Logic Diagram
DS100242-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
Recommended Operating
Conditions
Supply Voltage (V
CC
)
’ACQ
2.0V to 6.0V
−0.5V to +7.0V
’ACTQ
4.5V to 5.5V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V
Input Voltage (V
I
)
0VtoV
CC
−20 mA
Output Voltage (V
O
)
0VtoV
CC
V
I
=
V
CC
+ 0.5V
+20 mA
Operating Temperature (T
A
)
54ACQ/ACTQ
DC Input Voltage (V
I
)
−0.5V to V
CC
+ 0.5V
−55˚C to +125˚C
DC Output Diode Current (I
OK
)
V
O
=
−0.5V
Minimum Input Edge Rate
D
V/
D
t
−20 mA
’ACQ Devices
V
IN
from 30% to 70% of V
CC
V
CC
@
3.0V, 4.5V, 5.5V
V
O
=
V
CC
+ 0.5V
+20 mA
DC Output Voltage (V
O
)
−0.5V to V
CC
+ 0.5V
125 mV/ns
DC Output Source
or Sink Current (I
O
)
Minimum Input Edge Rate
D
V/
D
t
±
50 mA
’ACTQ Devices
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V 125 mV/ns
Note 1:
All commercial packaging is not recommended for applications re-
quiring greater than 2000 temperature cycles from −40˚C to +125˚C.
Note 2:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT
®
circuits outside databook specifications.
DC Characteristics for ’ACQ Family Devices
54ACQ
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
)
−65˚C to +150˚C
DC Latchup Source
or Sink Current
±
300 mA
Junction Temperature (T
J
)
CDIP
175˚C
T
A
=
−55˚C to +125˚C
Symbol
Parameter
V
CC
Units
Conditions
(V)
Guaranteed Limits
V
OUT
=
0.1V
V
IH
Minimum High Level
3.0
2.1
Input Voltage
4.5
3.15
V
or V
CC
− 0.1V
5.5
3.85
V
OUT
=
0.1V
V
IL
Maximum Low Level
3.0
0.9
Input Voltage
4.5
1.35
V
or V
CC
− 0.1V
5.5
1.65
I
OUT
=
−50 µA
V
OH
Minimum High Level
3.0
2.9
Output Voltage
4.5
4.4
V
5.5
5.4
(Note 3)
V
IN
=
V
IL
or V
IH
I
OH
=
−12 mA
3.0
2.4
I
OH
=
−24 mA
4.5
3.7
V
I
OH
=
−24 mA
5.5
4.7
V
OL
Maximum Low Level
3.0
0.1
I
OUT
= 50 µA
Output Voltage
4.5
0.1
V
5.5
0.1
(Note 3)
V
IN
= V
IL
or V
IH
3.0
0.50
I
OL
= 12 mA
4.5
0.50
V
I
OL
= 24 mA
5.5
0.50
I
OL
= 24 mA
±
1.0
I
IN
Maximum Input
5.5
µA
V
I
= V
CC
, GND
Leakage Current
(Note 5)
3
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DC Characteristics for ’ACQ Family Devices
(Continued)
54ACQ
T
A
=
−55˚C to +125˚C
Symbol
Parameter
V
CC
Units
Conditions
(V)
Guaranteed Limits
V
OLD
=
1.65 V
Max
I
OLD
(Note 4)
Minimum Dynamic
Output Current
5.5
50
mA
V
OHD
=
3.85 V
Min
I
OHD
5.5
−50
mA
V
IN
=
V
CC
I
CC
Maximum Quiescent
5.5
80.0
µA
Supply Current
or GND (Note 5)
V
I
(OE)
=
V
IL
,V
IH
I
OZ
Maximum TRI-STATE
±
5.0
V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
Leakage Current
5.5
µA
V
OLP
Quiet Output
5.0
1.75
V
Maximum Dynamic V
OL
(Notes 6, 7)
V
OLV
Quiet Output
5.0
−1.2
V
Minimum Dynamic V
OL
(Notes 6, 7)
Note 3:
All outputs loaded; thresholds on input associated with output under test.
Note 4:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 5:
I
IN
and I
CC
@
3.0V are guaranteed to be less than or equal to the respective limit
@
5.5V V
CC
.
I
CC
for 54ACQ
@
25˚C is identical to 74ACQ
@
25˚C.
Note 6:
Plastic DIP package.
Note 7:
Max number of outputs defined as (n). Data Inputs are driven 0V to 5V. One output
@
GND.
DC Characteristics for ’ACTQ Family Devices
54ACTQ
Symbol
Parameter
V
CC
T
A
= −55˚C to +125˚C
Units
Conditions
(V)
Guaranteed Limits
V
IH
Minimum High Level
4.5
2.0
V
V
OUT
= 0.1V
Input Voltage
5.5
2.0
or V
CC
− 0.1V
V
IL
Maximum Low Level
4.5
0.8
V
V
OUT
= 0.1V
Input Voltage
5.5
0.8
or V
CC
− 0.1V
I
OUT
=
−50 µA
V
OH
Minimum High Level
4.5
4.4
V
Output Voltage
5.5
5.4
(Note 8)
V
IN
=
V
IL
or V
IH
I
OH
=
−24 mA
4.5
3.70
V
I
OH
=
−24 mA
5.5
4.70
I
OUT
=
50 µA
V
OL
Maximum Low Level
4.5
0.1
V
Output Voltage
5.5
0.1
(Note 8)
V
IN
=
V
IL
or V
IH
I
OL
=
24 mA
4.5
0.50
V
I
OL
=
24 mA
5.5
0.50
±
1.0
V
I
=
V
CC
, GND
I
IN
Maximum Input
5.5
µA
Leakage Current
±
5.0
V
I
=
V
IL
,V
IH
I
OZ
Maximum TRI-STATE
5.5
µA
V
O
=
V
CC
, GND
Leakage Current
V
I
=
V
CC
− 2.1V
I
CCT
Maximum
5.5
1.6
mA
I
CC
/Input
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4
DC Characteristics for ’ACTQ Family Devices
(Continued)
54ACTQ
T
A
=
−55˚C to +125˚C
Symbol
Parameter
V
CC
Units
Conditions
(V)
Guaranteed Limits
V
OLD
=
1.65V Max
I
OLD
(Note 9)
Minimum Dynamic
Output Current
5.5
50
mA
V
OHD
=
3.85V Min
I
OHD
5.5
−50
mA
V
IN
=
V
CC
I
CC
Maximum Quiescent
5.5
80.0
µA
Supply Current
or GND (Note 10)
V
OLP
Quiet Output
5.0
1.5
V
(Notes 11, 12)
Maximum Dynamic V
OL
V
OLV
Quiet Output
5.0
−1.2
V
(Notes 11, 12)
Minimum Dynamic V
OL
Note 8:
All outputs loaded; thresholds on input associated with output under test.
Note 9:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 10:
I
CC
for 54ACTQ
@
25˚C is identical to 74ACTQ
@
25˚C.
Note 11:
Plastic DIP package.
Note 12:
Max number of outputs defined as (n). Data Inputs are driven 0V to 3V. One output
@
GND.
AC Electrical Characteristics
54ACQ
V
CC
T
A
= −55˚C
Fig.
Symbol
Parameter
(V)
to +125˚C
Units
No.
(Note 13)
C
L
= 50 pF
Min
Max
t
PHL
,
Propagation Delay
3.3
1.5
16.0
ns
t
PLH
D
n
to O
n
5.0
1.5
11.0
t
PLH
,
Propagation Delay
3.3
1.5
15.0
ns
t
PHL
LE to O
n
5.0
1.5
11.0
t
PZL
,
Output Enable Time
3.3
1.5
13.5
ns
t
PZH
5.0
1.5
10.0
t
PHZ
,
Output Disable Time
3.3
1.5
13.0
ns
t
PLZ
5.0
1.0
10.5
Note 13:
Voltage Range 5.0 is 5.0V
±
0.5V
Voltage Range 3.3 is 3.3V
±
0.3V
AC Operating Requirements
54ACQ
T
A
=
−55˚C
V
CC
Symbol
Parameter
(V)
to +125˚C
Units
C
L
=
50 pF
Guaranteed
Minimum
(Note 14)
t
S
Setup Time, HIGH or LOW
3.3
4.0
ns
D
n
to LE
5.0
4.0
t
H
Hold Time, HIGH or LOW
3.3
2.0
ns
D
n
to LE
5.0
2.0
t
W
LE Pulse Width, HIGH
3.3
5.0
ns
5.0
5.0
Note 14:
Voltage Range 5.0 is 5.0V
±
0.5V
Voltage Range 3.3 is 3.3V
±
0.3V
5
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