40N03P.PDF
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SSM40N03P
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Low gate charge
BV
DSS
30V
17m
W
Simple drive requirement
R
DS(ON)
40A
Fast switching
I
D
G
D
TO-220
S
Description
D
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G
S
The TO-220 package is widely preferred for commercial and
industrial applications and suited for low voltage applications such as
DC/DC converters and high efficiency switching circuits.
Absolute Maximum Ratings
Symbol
Parameter
Rating
Units
V
DS
Drain-Source Voltage
30
V
V
GS
Gate-Source Voltage
Continuous Drain Current, V
GS
@ 10V
V
±
20
I
D
@ T
C
=25°C
I
D
@ T
C
=100°C
I
DM
40 A
Continuous Drain Current, V
GS
@ 10V
30 A
Pulsed Drain Current
1
169
A
P
D
@ T
C
=25°C
Total Power Dissipation
50 W
Linear Derating Factor
0.4
W/°C
T
STG
T
J
Storage Temperature Range
-55 to 150 °C
Operating Junction Temperature Range
-55 to 150 °C
Thermal Data
Symbol
Parameter
Value
Unit
Rthj-c
Thermal Resistance Junction-case
Max.
2.5
°C/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
62
°C/W
www.SiliconStandard.com 1 of 6
Rev.2.01 7/01/2004
SSM40N03P
Electrical Characteristics @ T
j
=25
o
C (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
BV
DSS
Drain-Source Breakdown Voltage
V
GS
=0V, I
D
=250uA
30
-
-
V
D
D
Breakdown Voltage Temperature Coefficient
Reference to 25°C, I
D
=1mA
-
-
V/°C
0.037
BV
DSS
/
Tj
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
=10V, I
D
=20A
-
14
17
m
W
V
GS
=4.5V, I
D
=16A
-
20
23
m
W
V
GS(th)
Gate Threshold Voltage
V
DS
=V
GS
, I
D
=250uA
1
-
3
V
g
fs
Forward Transconductance
V
DS
=10V, I
D
=20A
-
26
-
S
I
DSS
Drain-Source Leakage Current (T
j
=25
o
C)
uA
V
DS
=30V, V
GS
=0V
-
-
1
Drain-Source Leakage Current (T
j
=150
o
C)
V
DS
=24V,V
GS
=0V
-
-
25
uA
I
GSS
nA
Gate-Source Leakage
V
GS
=
-
-
±
20V
±
100
Total Gate Charge
2
Q
g
I
D
=20A
-
17
-
nC
Q
gs
Gate-Source Charge
V
DS
=24V
-
3
-
nC
nC
Q
gd
Gate-Drain ("Miller") Charge
V
GS
=5V
-
10
-
Turn-on Delay Time
2
ns
t
d(on)
V
DS
=15V
-
7.2
-
t
r
Rise Time
I
D
=20A
-
60
-
ns
ns
t
d(off)
Turn-off Delay Time
R
G
=3.3
W
,
V
GS
=10V
-
22.5
-
ns
t
f
Fall Time
R
D
=0.75
W
-
10
-
pF
C
iss
Input Capacitance
V
GS
=0V
-
800
-
pF
C
oss
Output Capacitance
V
DS
=25V
-
380
-
C
rss
Reverse Transfer Capacitance
f=1.0MHz
-
133
-
pF
Source-Drain Diode
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
I
S
V
D
=V
G
=0V , V
S
=1.3V
-
-
40
A
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
1
A
I
SM
-
-
169
Forward On Voltage
2
V
SD
T
j
=25°C, I
S
=40A, V
GS
=0V
-
-
1.3
V
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width
<
300us , duty cycle
<
2%.
www.SiliconStandard.com 2 of 6
Rev.2.01 7/01/2004
SSM40N03P
150
T
C
=25
o
C
V
G
=10V
T
C
=150
o
C
V
G
=10V
150
V
G
=8.0V
V
G
=8.0V
100
V
G
=6.0V
V
G
=6.0V
100
50
V
G
=4.0V
V
G
=4.0V
50
V
G
=3.0V
V
G
=3.0V
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1.80
28
I
D
=20A
I
D
=20A
26
V
G
=10V
T
C
=25
o
C
1.60
24
1.40
22
1.20
20
18
1.00
16
0.80
14
0.60
12
3
4
5
6
7
8
9
10
11
-50
0
50
100
150
V
GS
(V)
T
j
, Junction Temperature (
o
C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
www.SiliconStandard.com 3 of 6
Rev.2.01 7/01/2004
SSM40N03P
50
60
45
50
40
35
40
30
25
30
20
20
15
10
10
5
0
0
25
50
75
100
125
150
0
50
100
150
T
c
,Case Temperature (
o
C)
T
c
, Case Temperature (
o
C)
Fig 5. Maximum Drain Current vs.
Fig 6. Typical Power Dissipation
Case Temperature
1
1000
DUTY=0.5
0.2
100
10us
0.1
0.1
0.05
100us
P
DM
0.02
0.01
SINGLE PULSE
t
10
1ms
T
10ms
Duty factor = t/T
Peak T
j
= P
DM
x R
thjc
+ T
C
T
c
=25
o
C
Single Pulse
100ms
0.01
1
0.00001
0.0001
0.001
0.01
0.1
1
1
10
100
V
DS
(V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
www.SiliconStandard.com 4 of 6
Rev.2.01 7/01/2004
SSM40N03P
f=1.0MHz
16
10000
Id=20A
14
V
D
=16V
V
D
=20V
12
V
D
=24V
10
Ciss
8
1000
6
Coss
4
2
Crss
0
100
0
5
10
15
20
25
30
35
40
1
5
9
13
17
21
25
29
Q
G
, Total Gate Charge (nC)
V
DS
(V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
3
T
j
= 150
o
C
10
2
T
j
= 25
o
C
1
1
0.1
0.01
0
-50
0
50
100
150
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
V
SD
(V)
T
j
, Junction Temperature (
o
C )
Fig 11. Forward Characteristic of
Fig 12. Gate Threshold Voltage vs.
Reverse Diode
Junction Temperature
www.SiliconStandard.com 5 of 6
Rev.2.01 7/01/2004
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