EDL71 - Schematics.pdf

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COMPAL CONFIDENTIAL
MODEL NAME :
EDL70/71
COMPAL P/N :
PCB NO :
D
D
Revision :
1B
EDL70/71 Schematics Document
uFCBGA/uFCPGA Mobile Dothan
C
C
Intel Alviso + ICH6M
2005-02-25
REV : 1B
B
B
A
A
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2351
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
Re v
401304
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
,
걐듁ꑇ
꒭ꓫ
24, 2005
Sheet
1
of
61
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955692240.514.png 955692240.525.png 955692240.536.png 955692240.547.png 955692240.001.png 955692240.012.png 955692240.023.png 955692240.034.png 955692240.045.png 955692240.055.png 955692240.066.png 955692240.077.png 955692240.088.png 955692240.099.png 955692240.110.png 955692240.121.png 955692240.131.png 955692240.142.png 955692240.153.png 955692240.164.png 955692240.175.png 955692240.185.png 955692240.196.png 955692240.207.png 955692240.218.png 955692240.229.png 955692240.240.png 955692240.251.png 955692240.262.png 955692240.273.png 955692240.284.png 955692240.295.png 955692240.306.png 955692240.317.png 955692240.328.png 955692240.339.png 955692240.350.png 955692240.361.png 955692240.372.png
 
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Compal confidential
Model : EDL71
Pentium-M
FAN
Thermal(CPU)
+3VS
Dothan
G781
uFCPGA CPU
+5VS
page 8
page 8
+VCCP (1.05V)
+CPU_CORE
Clock Generator
page 5,6,7
478pin
ICS954226
D
D
+3VS
page 17
H_A#(3..31)
System Bus
H_D#(0..63)
+VCCP 400/533 MHz
TV OUT
INTEL
page 25
Memory BUS
(DDRI)
DDRI-DIMM X2
Alviso
+1.5VS
+1.8VS
+VGA_CORE
+3VS
+2.5VS
2.5V 333 MHz
BANK 0, 1, 2, 3
CRT CON page 25
+1.5VS
+2.5V
+VCCP
+3VS
1257BGA
PCI-E 16X
CRT Signal
ATI M24P
+1.25VS
+2.5V
Internal LVDS
page 14,15
LVDS CONN
page 24
page 9,10,11,12,13
+1.2VS
page 18,19,20,21
+2.5VS
Frame Buffer
Thermal(VGA)
+3VS
64/128
DMI
C
page 22,23
G781-1 page 26
C
+1.5VS
100MHz
IDSEL:AD18
(PIRQG#,PIRQH#,GNT#1,REQ#1)
+3VALW 33MHz
USB Ports X4
IDSEL:AD19
(PIRQH#,PIRQG#,GNT#4,REQ#4)
IDSEL:AD20
(PIRQA,B#,GNT#2,REQ#2),SIRQ
PCI BUS
48MHz
USB[0,2,4,6]
INTEL
+3VS
+3V
+1.5VS
+1.5V
+2.5VS
+5VALW
page 40
IDSEL:AD16
(PIRQE#,GNT#0,REQ#0)
IDSEL:AD17
(PIRQF#,GNT#3,REQ#3)
ICH6-M
24.576MHz
AC-LINK
609 BGA
CardBus Controller
ENE CB712
Minipci CONN X2
VT6301S
RTL8110SBL
/8100CL
ATA100
WIRELESS
TV Turner
1394 Controller
MDC
+S1_VCC
+3VS
page 27,28,29,30
page 32
+3VS
page 34
+5VS
+3VS
+3VALW
page 35
+3V
page 37,38
Port DEBUG
LPC BUS
page 39
+5VS
+3VALW
33MHz
1394
CONN
+3VS
page 43
Cable
Card
Reader
PCMCIA
Slot
Parallel ATA
page 31
AC97 Codec
RJ45
page 36
B
B
ALC250
page 34
KB910
+5VS
+VCC_5IN1
+S1_VCC
+S1_VPP
+5VAMP
RJ11
page 33
page 33
X BUS
+3VS
page 44
page 36
IDE
CD-ROM
+1.5VS/+VCCP
+5VS
+3VALW
page 41
RTC BATT
SST39VF040
page 53
+5VCD
page 42
page 31
+1.8VS/
+VGA_COR page 54
Int.KB page 43
page 50
DC IN
AMP & INT.
Speaker
HeadPhone &
MIC CONN
page 48
Power On/Off
SW & LED
page 43
2.5V/+1.2VS/
+1.25VS
+5VAMP
+5VAMP
CPU_CORE
page 45
page 45
page 55
page 52
Touch Pad &
LID SW
A
A
CHARGER
3V/5V/12V
DC/DC Interface
+5VS
page 43
page 49
page 51
page 47
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2351
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401304
C
Date:
,
걐듁ꑇ
꒭ꓫ
24, 2005
Sheet
2
of
61
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955692240.393.png 955692240.404.png 955692240.415.png 955692240.426.png 955692240.437.png 955692240.448.png 955692240.459.png 955692240.470.png 955692240.481.png 955692240.492.png 955692240.503.png 955692240.511.png 955692240.512.png 955692240.513.png 955692240.515.png 955692240.516.png 955692240.517.png 955692240.518.png 955692240.519.png 955692240.520.png 955692240.521.png 955692240.522.png 955692240.523.png 955692240.524.png 955692240.526.png 955692240.527.png 955692240.528.png 955692240.529.png 955692240.530.png 955692240.531.png 955692240.532.png 955692240.533.png 955692240.534.png 955692240.535.png 955692240.537.png 955692240.538.png 955692240.539.png 955692240.540.png 955692240.541.png 955692240.542.png 955692240.543.png 955692240.544.png 955692240.545.png 955692240.546.png 955692240.548.png 955692240.549.png 955692240.550.png 955692240.551.png 955692240.552.png 955692240.553.png 955692240.554.png 955692240.555.png 955692240.556.png 955692240.557.png 955692240.002.png 955692240.003.png 955692240.004.png 955692240.005.png 955692240.006.png 955692240.007.png 955692240.008.png 955692240.009.png 955692240.010.png 955692240.011.png 955692240.013.png 955692240.014.png 955692240.015.png 955692240.016.png 955692240.017.png 955692240.018.png 955692240.019.png 955692240.020.png 955692240.021.png 955692240.022.png 955692240.024.png 955692240.025.png 955692240.026.png 955692240.027.png 955692240.028.png 955692240.029.png 955692240.030.png 955692240.031.png 955692240.032.png 955692240.033.png 955692240.035.png 955692240.036.png 955692240.037.png 955692240.038.png 955692240.039.png 955692240.040.png 955692240.041.png 955692240.042.png 955692240.043.png 955692240.044.png 955692240.046.png
 
5
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1
D
D
AC
Adapter
in
VIN
MAINPWON
LM358
Thermal
Protector
VS
P48
P50
SWITCH
ADPPWR
VL
FAN5234
DC/DC
(2.5V)
P49
RUN
+3VALWP
+2.5V 7.106A
P53
SUSP
VR_ON
B+
MAX1902
DC/DC
(3V/5V/12V)
B+
+5VS
+12VALWP
MB3887
Charger
VCC
SHDN#
BATT+
+5VALWP
+1.2 5V 1A
MAX1532
DC/DC
(CPU_CORE)
C
C
SHDN#
P52
P50
VS
2.5VP
2.5VREF
ALP5331
DC/DC
(1.25V)
Vcc
P55
MAX8743
DC/DC
(1.5V/VCCP)
+1.5VP 5A
3VALW
51_ON #
TPO610T
SWITCH
SUSP
P53
EN
VMB
P50
B+
CPU_CORE
(+1.308V 25A)
CHGRTC
VS_ON1/VS_ON2
ON1/ON2
P54
G920
RTC BATT
Charger
+VCCP 6.420A
P50
Battery A
8 Cell
B+
B
B
Battery
Connector
A
CHG/DIS
P48
BATT+
SWITCH
BATT
P48
LM393
BATT OVP
VS
P49
BATT_OVP
A
A
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2351
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
Re v
401304
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
,
걐듁ꑇ
꒭ꓫ
24, 2005
Sheet
3
of
61
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3
2
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955692240.047.png 955692240.048.png 955692240.049.png 955692240.050.png 955692240.051.png 955692240.052.png 955692240.053.png 955692240.054.png 955692240.056.png 955692240.057.png 955692240.058.png 955692240.059.png 955692240.060.png 955692240.061.png 955692240.062.png 955692240.063.png 955692240.064.png 955692240.065.png 955692240.067.png 955692240.068.png 955692240.069.png 955692240.070.png 955692240.071.png 955692240.072.png 955692240.073.png 955692240.074.png 955692240.075.png 955692240.076.png 955692240.078.png 955692240.079.png 955692240.080.png 955692240.081.png 955692240.082.png 955692240.083.png 955692240.084.png 955692240.085.png 955692240.086.png 955692240.087.png 955692240.089.png 955692240.090.png 955692240.091.png 955692240.092.png 955692240.093.png 955692240.094.png 955692240.095.png 955692240.096.png 955692240.097.png 955692240.098.png 955692240.100.png 955692240.101.png 955692240.102.png 955692240.103.png 955692240.104.png 955692240.105.png 955692240.106.png 955692240.107.png 955692240.108.png 955692240.109.png 955692240.111.png 955692240.112.png 955692240.113.png 955692240.114.png 955692240.115.png 955692240.116.png 955692240.117.png 955692240.118.png 955692240.119.png 955692240.120.png
 
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4
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Board ID Table for AD channel
Vcc
3.3V +/- 5%
100K +/- 5%
Ra
Board ID
Voltage Rails
Rb
V
min
V
typ
V AD_BID max
AD_BID
AD_BID
Power Plane
Description
S0-S1
S3
S5
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V
0 V
0 V
0.250 V
0.289 V
VIN
B+
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
N/A
N/A
N/A
N/A
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
D
D
N/A
N/A
+CPU_CORE
ON
OFF
OFF
4
5
6
7
1.036 V
1.453 V
1.185 V
1.264 V
+PCIE_1.2VS
+PCIE_1.2VS power rail for VGA PCIExpress
ON
OFF
OFF
1.650 V
1.759 V
+0.9VS
0.9VS for DDR2 Termination
ON
OFF
OFF
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
+VGA_CORE
VGA Core Power
ON
OFF
OFF
NC
3.300 V
+1.5VS
MCH & ICH Core Power
ON
OFF
OFF
+1.8VS
1.8V switched power rail
ON
OFF
OFF
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1
+2.5VS
2.5VS switched power rail
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
0.2
+3V
3.3V power rail
ON
ON
OFF
0.3
0.4
0.5
0.6
+3VS
3.3V switched power rail
ON
OFF
OFF
+5VALW
+5VS
5V always on power rail
ON
ON
ON*
5V switched power rail
ON
OFF
OFF
+12VALW
12V always on power rail
ON
ON
ON*
1.0
C
+RTCVCC
RTC power
ON
ON
ON
C
*
1.B
SKU ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Vcc
3.3V +/- 5%
100K +/- 5%
Ra
Board ID
Rb
V
min
V
typ
V AD_BID max
AD_BID
AD_BID
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V
0 V
0 V
0.250 V
0.289 V
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
External PCI Devices
Device
IDSEL#
REQ#/GNT#
Interrupts
4
5
6
7
1.036 V
1.453 V
1.185 V
1.264 V
VGA
PIRQA
1.650 V
1.759 V
1394
AD16
0
PIRQE
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
B
B
LAN
AD17
3
PIRQF
NC
3.300 V
CardBus
Mini-PCI
AD20
AD18
2
1
PIRQA,B
PIRQG/PIRQH
SKU ID
0
1
2
3
4
5
6
7
EDL71 SKU
EDL71 10/100 LAN WO/TV TUNER
*
Mini-PCI II for TV Turnner
AD19
4
PIRQH/PIRQG
EDL71 GIGA LAN W/TV TURNER
EC SM Bus1 address
EC SM Bus2 address
EDL71 10/100LAN W/TV TUNER
EDL71 GIGA WO/TV TUNER
Device
Address
Device
Address
EDL71 10/100 LAN WO/TV TUNER
EDL71 10/100LAN W/TV TUNER
EDL71 GIGA WO/TV TUNER
EDL71 GIGA LAN W/TV TURNER
Smart Battery
G781
0001 011X b
1001 100X b
EEPROM(24C16/02)
1010 000X b
G781-1
1001 101X b
ICH6 SM Bus address
NOTE1:
SWDJ@ : SWDJ
NOSWDJ@ : W/O SWDJ
Device
Clock Generator
( ICS954206)
Address
TV@ : TV Tunner
1101 001Xb
100@ : 10/100M LAN
GIGA@ : 10/100M/1000M LAN
A
A
@XX : Depop component
DDRII DIMM0
1010 000Xb
DDRII DIMM1
1@XX : Pop for Integrated Graphic
2@XX : Pop for External Graphic
1010 001Xb
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2351
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
Re v
C
401304
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
,
걐듁ꑇ
꒭ꓫ
24, 2005
Sheet
4
of
61
5
4
3
2
1
955692240.122.png 955692240.123.png 955692240.124.png 955692240.125.png 955692240.126.png 955692240.127.png 955692240.128.png 955692240.129.png 955692240.130.png 955692240.132.png 955692240.133.png 955692240.134.png 955692240.135.png 955692240.136.png 955692240.137.png 955692240.138.png 955692240.139.png 955692240.140.png 955692240.141.png 955692240.143.png 955692240.144.png 955692240.145.png 955692240.146.png 955692240.147.png 955692240.148.png 955692240.149.png 955692240.150.png 955692240.151.png 955692240.152.png 955692240.154.png 955692240.155.png 955692240.156.png 955692240.157.png 955692240.158.png 955692240.159.png 955692240.160.png 955692240.161.png 955692240.162.png 955692240.163.png 955692240.165.png 955692240.166.png 955692240.167.png 955692240.168.png 955692240.169.png 955692240.170.png 955692240.171.png 955692240.172.png 955692240.173.png 955692240.174.png 955692240.176.png 955692240.177.png
 
5
4
3
2
1
9
H_A#[3..31]
H_D#[0..63] 9
JP1A
H_A#3
Dothan
H_D#0
P4
A19
A3#
D0#
H_A#4
H_D#1
U4
A25
A4#
D1#
H_A#5
H_D#2
V3
A22
A5#
D2#
H_A#6
H_D#3
R3
B21
A6#
D3#
H_A#7
H_D#4
V2
A24
A7#
D4#
H_A#8
H_D#5
W1
B26
A8#
D5#
H_A#9
H_D#6
+3V
T4
A21
A9#
D6#
H_A#10
H_D#7
R63
150_0603_1%
W2
B20
A10#
D7#
H_A#11
H_D#8
Y4
C20
A11#
D8#
H_A#12
H_D#9
ITP_DBRESET#
Y1
B24
1
2
A12#
D9#
H_A#13
U1
D24
H_D#10
D
D
A13#
D10#
H_A#14
AA3
E24
H_D#11
A14#
D11#
+VCCP
H_A#15
Y3
C26
H_D#12
A15#
D12#
H_A#16
AA2
B23
H_D#13
R64
54.9_0603_1% @
1
A16#
D13#
H_A#17
H_D#14
AF4
E23
A17#
D14#
H_A#18
H_D#15
ITP_TDO
AC4
C25
2
A18#
D15#
H_A#19
H_D#16
R65
54.9_0603_1%
AC7
H23
A19#
D16#
H_A#20
H_D#17
@
1
AC3
G25
A20#
D17#
H_A#21
H_D#18
H_RESET#
AD3
L23
2
A21#
D18#
H_A#22
H_D#19
AE4
M26
A22#
D19#
H_A#23
H_D#20
AD2
H24
A23#
D20#
+VCCP
H_A#24
H_D#21
R66
39.2_0603_1%
AB4
F25
A24#
D21#
H_A#25
ADDR GROUP
DATA GROUP
H_D#22
AC6
G24
A25#
D22#
H_A#26
H_D#23
ITP_TMS
AD5
J23
1
2
A26#
D23#
H_A#27
H_D#24
R68
150_0603_1%
AE2
M23
A27#
D24#
H_A#28
H_A#29
H_D#25
AD6
J25
A28#
D25#
H_D#26
ITP_TDI
AF3
L26
1
2
A29#
D26#
H_A#30
H_D#27
This shall place near CPU
AE1
N24
A30#
D27#
H_A#31
H_D#28
R70
680_0402_5%
AF1
M25
9
H_REQ#[0..4]
A31#
D28#
H_D#29
H26
D29#
H_REQ#0
H_D#30
ITP_TRST#
R2
N25
1
2
REQ0#
D30#
H_REQ#1
H_D#31
R71
27.4_0603_1%
P3
K25
REQ1#
D31#
H_REQ#2
H_REQ#4
H_D#32
T2
Y26
REQ2#
D32#
H_REQ#3
H_D#33
ITP_TCK
P1
AA24
1
2
REQ3#
D33#
H_D#34
T1
T25
REQ4#
D34#
U23
H_D#35
D35#
H_ADSTB#0
U3
V23
H_D#36
9
H_ADSTB#0
ADSTB0#
D36#
H_ADSTB#1
AE5
R24
H_D#37
9
H_ADSTB#1
ADSTB1#
D37#
R26
H_D#38
D38#
C
H_D#39
C
R23
D39#
@
R801
0_0402_5%
CPU_ITTP
H_D#40
2
1
A16
AA23
17
CLK_CPU_ITP
ITP_CLK0
D40#
CPU_ITTP#
H_D#41
2
1
A15
U26
17
CLK_CPU_ITP#
ITP_CLK1
D41#
@
R802
0_0402_5%
H_D#42
V24
D42#
CLK_CPU_BCLK
H_D#43
B15
U25
17
CLK_CPU_BCLK
BCLK0
D43#
CLK_CPU_BCLK#
HOST CLK
H_D#44
B14
V26
17
CLK_CPU_BCLK#
BCLK1
D44#
H_D#45
Y23
D45#
H_D#46
AA26
D46#
H_D#47
Y25
D47#
H_ADS#
H_D#48
N2
AB25
9
H_ADS#
ADS#
D48#
H_BNR#
H_D#49
L1
AC23
9
H_BNR#
BNR#
D49#
H_BPRI#
H_D#50
J3
AB24
9
H_BPRI#
BPRI#
D50#
H_BR0#
H_D#51
N4
AC20
9
H_BR0#
BR0#
D51#
H_DEFER#
H_D#52
L4
AC22
9
H_DEFER#
DEFER#
D52#
H_DRDY#
H_D#53
H2
AC25
9
H_DRDY#
DRDY#
D53#
R72
56_0402_5%
H_HIT#
H_D#54
K3
AD23
9
H_HIT#
HIT#
D54#
H_HITM#
CONTROL GROUP
H_D#55
K4
AE22
9
H_HITM#
HITM#
D55#
H_IERR#
H_D#56
1
2
A4
AF23
+VCCP
IERR#
D56#
H_LOCK#
H_RESET#
H_D#57
J2
AD24
9
H_LOCK#
LOCK#
D57#
H_D#58
B11
AF20
9
H_RESET#
RESET#
D58#
H_D#59
AE21
D59#
AD21
H_D#60
9
H_RS#[0..2]
D60#
H_RS#0
H1
AF25
H_D#61
RS0#
D61#
H_RS#1
K1
AF22
H_D#62
+3VS
RS1#
D62#
H_RS#2
L2
AF26
H_D#63
RS2#
D63#
H_TRDY#
M3
9
H_TRDY#
TRDY#
+VCCP
D25
H_DINV#0 9
H_DINV#1 9
H_DINV#2 9
H_DINV#3 9
DINV0#
R731
1K_0402_5%
J26
DINV1#
B
B
C8
T24
BPM0#
DINV2#
B8
AD20
BPM1#
DINV3#
A9
BPM2#
C9
H_DSTBN#[0..3] 9
BPM3#
H_DSTBN#0
R730
56_0402_5%
C23
DSTBN0#
ITP_DBRESET#
H_DSTBN#1
A7
K24
DBR#
DSTBN1#
H_DBSY#
H_DSTBN#2
M2
W25
9
H_DBSY#
DBSY#
DSTBN2#
PROCHOT# 41
H_DPSLP#
H_DSTBN#3
B7
AE24
28
H_DPSLP#
DPSLP#
DSTBN3#
H_DSTBP#[0..3] 9
H_DPRSLP#
H_DSTBP#0
R147
56_0402_5%
C
G1
C22
28
H_DPRSLP#
DPRSTP#
DSTBP0#
H_DSTBP#1
Q67
2SC2411K_SC59
C19
L24
2
9
H_DPWR#
DPWR#
DSTBP1#
MISC
H_DSTBP#2
B
A10
W24
PRDY#
DSTBP2#
H_DSTBP#3
E
B10
AE25
PREQ#
DSTBP3#
H_PROCHOT#
B17
PROCHOT#
H_PROCHOT#
E4
28
H_CPUPWRGD
PWRGOOD
H_CPUSLP#
A6
9,28
H_CPUSLP#
SLP#
ITP_TCK
A13
TCK
ITP_TDI
C12
C2
H_A20M#
TDI
A20M#
H_A20M# 28
H_FERR# 28
H_IGNNE# 28
H_INIT# 28
H_INTR 28
H_NMI
ITP_TDO
A12
D3
H_FERR#
TDO
FERR#
TEST1
TEST2
C5
A3
H_IGNNE#
R149
TEST1
IGNNE#
F23
B5
H_INIT#
TEST2
1
2
TEST2
INIT#
ITP_TMS
H_INTR
C11
D1
TMS
LINT0
ITP_TRST#
H_NMI
@
1K_0402_5%
B13
D4
28
TRST#
LINT1
LEGACY CPU
R148
THERMAL
DIODE
TEST1
1
2
H_THERMDA
H_THERMDC
H_STPCLK#
B18
C6
8
H_THERMDA
H_STPCLK# 28
H_SMI# 28
THERMDA
STPCLK#
H_SMI#
@
1K_0402_5%
A18
B4
8
H_THERMDC
THERMDC
SMI#
C17
8,9,28
H_THERMTRIP#
THERMTRIP#
A
A
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
TYCO_1612365-1_Dothan
75ohm pull-up of H_THERMTRIP#
should be within 2" from the
series resistor
R88
75_0402_5%
Compal Electronics, Inc.
H_THERMTRIP#
1
2
+VCCP
Title
SCHEMATIC, M/B LA-2351
R74
200_0402_5%
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Add pullups for PWRGOOD and THERMTRIP per INTEL
Size
Document Number
Re v
H_CPUPWRGD
C
2
401304
+VCCP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
,
걐듁ꑇ
꒭ꓫ
24, 2005
Sheet
5
of
61
5
4
3
2
1
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