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The MC34119 is a low power audio amplifier intergrated circuit intended
(primarily) for telephone applications, such as in speakerphones. It provides
differential speaker outputs to maximize output swing at low supply voltages
(2.0 V minimum). Coupling capacitors to the speaker are not required. Open
loop gain is 80 dB, and the closed loop gain is set with two external resistors.
A Chip Disable pin permits powering down and/or muting the input signal.
The MC34119 is available in standard 8–pin DIP, SOIC package, and
TSSOP package.
•
LOW POWER
AUDIO AMPLIFIER
Wide Operating Supply Voltage Range (2.0 V to 16 V), Allows
Telephone
Line Powered Applications
SEMICONDUCTOR
TECHNICAL DATA
•
Low Quiescent Supply Current (2.7 mA Typ) for Battery
Powered Applications
•
Chip Disable Input to Power Down the IC
8
•
Low Power–Down Quiescent Current (65
m
A Typ)
1
•
Drives a Wide Range of Speaker Loads (8.0
W
and Up)
P SUFFIX
PLASTIC PACKAGE
CASE 626
•
Output Power Exceeds 250 mW with 32 W Speaker
•
Low Total Harmonic Distortion (0.5% Typ)
•
Gain Adjustable from <0 dB to >46 dB for Voice Band
•
Requires Few External Components
8
1
MAXIMUM RATINGS
Rating
Value
Unit
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
Supply Voltage
–1.0 to +18
Vdc
Maximum Output Current at V O1 , V O2
± 250
mA
8
Maximum Voltage @ V in , FC1, FC2, CD
Applied Output Voltage to V O1 , V O2 when disabled
–1.0, V CC + 1.0
–1.0, V CC + 1.0
Vdc
1
DTB SUFFIX
PLASTIC PACKAGE
CASE 948J
(TSSOP)
Junction Temperature
–55, +140
°
C
NOTE: ESD data available upon request.
Block Diagram and Simplified Application
PIN CONNECTIONS
Rf
7 5 k
CD
1
8
V O2
6 V CC
FC2
2
7
Gnd
C i
0.1
R i
3 .0 k V in 4
FC1 3
FC1
3
6
V CC
Audio
Input
–
+ #1
5 V O1
Speaker
V in
4
5
V O1
4.0 k 4 .0 k
C1
(Top View)
1.0
m
F
C2*
5. 0 m F
2
50 k
1 25 k
–
+ #2
8 V O2
ORDERING INFORMATION
FC2
50 k
Bias
Circuit
1 CD
Chip
Disable
Operating
Temperature Range Package
Device
MC34119
7
MC34119P
MC34119D
Plastic DIP
SO–8
* = Optional
Differential Gian = 2 x
Gnd
T A = –20 ° to +70 ° C
R f
R i
This device contains 45 active transistors.
MC34119DTB
TSSOP
W Motorola, Inc. 1996
Rev 1
MOTOROLA ANALOG IC DEVICE DATA
1
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MC34119
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Max
Unit
Supply Voltage
V CC
+2.0
+16
Vdc
Voltage @ CD (Pin 1)
V CD
0
V CC
Vdc
Load Impedance
R L
8.0
–
W
Peak Load Current
I L
–
± 200
mA
Differential Gain (5.0 kHz Bandwidth)
AVD
0
46
dB
Ambient Temperature
T A
–20
+70
° C
ELECTRICAL CHARACTERISTICS (T A = 25 ° C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
AMPLIFIERS (AC CHARACTERISTICS)
AC Input Resistance (@ V In )
r i
–
>30
–
M W
Open Loop Gain (Amplifier #1, f < 100 Hz)
A VOL1
80
–
–
dB
Closed Loop Gain (Amplifier #2, V CC = 6.0 V, f = 1.0 kHz, R L = 32
W
)
A V2
–0.35
0
+0.35
dB
Gain Bandwidth Product
GBW
–
1.5
–
MHz
Output Power;
mW
V CC = 3.0 V, R L = 16 W , THD 3 10%
P Out3
55
–
–
V CC = 6.0 V, R L = 32
W,
THD
3
10%
P Out6
250
–
–
V CC = 12 V, R L = 100 W, THD 3 10%
P Out12
400
–
–
Total Harmonic Distortion (f = 1.0 kHz)
THD
%
(V CC = 6.0 V, R L = 32 W , P out = 125 mW)
–
0.5
1.0
(V CC
.
3.0 V, R L = 8.0
W
, P out = 20 mW)
–
0.5
–
(V CC . 12 V, R L = 32 W , P out = 200 mW)
–
0.6
–
Power Supply Rejection (V CC = 6.0 V, D V CC = 3.0 V)
PSRR
dB
(C1 =
8
, C2 = 0.01
m
F)
50
–
–
(C1 = 0.1 m F, C2 = 0, f = 1.0 kHz)
–
12
–
(C1 = 1.0
m
F, C2 = 5.0
F, f = 1.0 kHz)
–
52
–
Differential Muting (V CC = 6.0 V, 1.0 kHz 3 f 3 20 kHz, CD = 2.0 V)
GMT
–
>70
–
dB
AMPLIFIERS (DC CHARACTERISTICS)
Output DC Level @ V O1 , V O2 , V CC = 3.0 V, R L = 16 (R f = 75 k)
V O(3)
1.0
1.15
1.25
Vdc
V CC = 6.0 V
V O(6)
–
2.65
–
V CC = 12 V
V O(12)
–
5.65
–
Output Level
Vdc
High (I out = –75 mA, 2.0 V 3 V CC 3 16 V)
V OH
–
V CC – 1.0
–
Low (I out = 75 mA, 2.0 V 3 V CC 3 16 V)
V OL
–
0.16
–
Output DC Offset Voltage (V O1 –V O2 )
D
V O
mV
(V CC = 6.0 V, R f = 75 k W , R L = 32 W )
–30
0
+30
Input Bias Current @ V in (V CC = 6.0 V)
I IB
–
–100
–200
nA
Equivalent Resistance
k W
@ FC1 (V CC = 6.0 V)
R FC1
100
150
220
@ FC2 (V CC = 6.0 V)
R FC2
18
25
40
CHIP DISABLE (Pin 1)
Input Voltage
Vdc
Low
V IL
–
–
0.8
High
V IH
2.0
–
–
Input Resistance (V CC = V CD = 16 V)
R CD
50
90
175
k
W
POWER SUPPLY
Power Supply Current
(V CC = 3.0 V, R L = 8 , CD = 0.8 V)
I CC3
–
2.7
4.0
mA
(V CC = 16 V, R L =
8
, CD = 0.8 V)
I CC16
–
3.3
5.0
mA
(V CC = 3.0 V, R L = 8 , CD = 2.0 V)
I CCD
–
65
100
m A
NOTE: Currents into a pin are positive, currents out of a pin are negative.
2
MOTOROLA ANALOG IC DEVICE DATA
m
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MC34119
PIN FUNCTION DESCRIPTION
Symbol
Pin
Description
CD
1
Chip Disable – Digital input. A Logic “0” (<0.8 V) sets normal operation. A logic “1” ( . 2.0 V) sets the power down
mode. Input impedance is nominally 90 k
W
.
FC2
2
A capacitor at this pin increases power supply rejection, and affects turn–on time. This pin can be left open if the
capacitor at FC1 is sufficient.
FC1
3
F capacitor at Pin 2) provides
(typically) 52 dB of power supply rejection. Turn–on time of the circuit is affected by the capacitor on this pin. This
pin can be used as an alternate input.
m
F capacitor at this pin (with a 5.0
m
V in
4
Amplifier input. The input capacitor and resistor set low frequency rolloff and input impedance. The feedback
resistor is connected to this pin and V O1 .
V O1
5
Amplifier Output #1. The dc level is 9 (V CC – 0.7 V)/2.
V CC
6
DC supply voltage (+2.0 V to +16 V) is applied to this pin.
GND
7
Ground pin for the entire circuit.
V O2
8
Amplifier Output #2. This signal is equal in amplitude, but 180 ° out–of–phase with that at V O1 .
The dc level is 9 (V CC – 0.7 V)/2.
TYPICAL TEMPERATURE PERFORMANCE (–20 ° C < T A < +70 ° C)
Function
Typical Change
Units
Input Bias Current (@ V in )
±
40
pA/
C
Total Harmonic Distortion
+0.003
%/ ° C
(V CC = 6.0 V, R L = 32
W
. P out = 125 mW, f = 1.0 kHz)
Power Supply Current
m A/ ° C
(V CC = 3.0 V, R L =
8
, CD = 0 V)
–2.5
(V CC = 3.0 V, R L = 8 , CD = 2.0 V)
–0.03
MOTOROLA ANALOG IC DEVICE DATA
3
Analog ground for the amplifiers. A 1.0
°
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MC34119
DESIGN GUIDELINES
General
The MC34119 is a low power audio amplifier capable of
low voltage operation (V CC = 2.0 V minimum) such as that
encountered in line–powered speakerphones. The circuit
provides a differential output (V O1 –V O2 ) to the speaker to
maximize the available voltage swing at low voltages. The
differential gain is set by two external resistors. Pins FC1 and
FC2 allow controlling the amount of power supply and noise
rejection, as well as providing alternate inputs to the
amplifiers. The CD pin permits powering down the IC for
muting purposes and to conserve power.
Figure 1. Turn–On Time versus C1, C2 at Power–On
360
300
240
C1 = 5.0 m F
180
120
C1 = 1.0 m F
60
Amplifiers
Referring to the block diagram, the internal configuration
consists of two identical operational amplifiers. Amplifier #1
has an open loop gain of . 80 dB (at f 3 100 Hz), and the
closed loop gain is set by external resistor R f and R i . The
amplifier is unity gain stable, and has a unity gain frequency
of approximately 1.5 MHz. In order to adequately cover the
telephone voice band (300 Hz to 3400 Hz), a maximum
closed loop gain of 46 is recommended. Amplifier #2 is
internally set to a gain of – 1.0 (0 dB).
The outputs of both amplifiers are capable of sourcing and
sinking a peak current of 200 mA. The outputs can typically
swing to within 9 0.4 V above ground, and to within 9 1.3 V
below V CC , at the maximum current. See Figures 18 and 19
for V OH and V OL curves.
The output dc offset voltage (V O1 –V O2 ) is primarily a
function of the feedback resistor (R f ), and secondarily due to
the amplifiers’ input offset voltages. The input offset voltage
of the two amplifiers will generally be similar for a particular
IC, and therefore nearly cancel each other at the outputs.
Amplifier #1’s bias current, however, flows out of V in (Pin 4)
and through R f , forcing V O1 to shift negative by an amount
equal to [R f × I IB ]. V O2 is shifted positive an equal amount.
The output offset voltage, specified in the Electrical
Characteristics, is measured with the feedback resistor
shown in the Typical Application Circuit, and therefore takes
into account the bias current as well as internal offset
voltages of the amplifiers. The bias current is constant with
respect to V CC .
FC1 and FC2
Power supply rejection is provided by the capacitors (C1
and C2 in the Typical Application Circuit) at FC1 and FC2. C2
is somewhat dominant at low frequencies, while C1 is
dominant at high frequencies, as shown in the graphs of
Figures 4 to 7. The required values of C1 and C2 depend on
the conditions of each application. A line powered
speakerphone, for example, will require more filtering than a
circuit powered by a well regulated power supply. The
amount of rejection is a function of the capacitors, and the
equivalent impedance looking into FC1 and FC2 (listed in the
Electrical Characteristics as R FC1 and R FC2 ).
In addition to providing filtering, C1 and C2 also affect the
turn–on time of the circuit at power–up, since the two
capacitors must charge up through the internal 50 k and
125 k W resistors. The graph of Figure 1 indicates the
turn–on time upon application of V CC of +6.0 V. The turn–on
time is 9 60% longer for V CC = 3.0 V, and 9 20% less for
V CC = 9.0 V. Turn–off time is <10 m s upon removal of V CC .
V CC switching from
0 V to 6.0 V
0
0
2.0
4.0
6.0
8.0
10
C2, CAPACITANCE (
m
F)
. The power supply current (when disabled) is
shown in Figure 15.
Muting, defined as the change in differential gain from
normal operation to muted operation, is in excess of 70 dB.
The turn–off time of the audio output, from the application of
the CD signal, is <2.0 m s, and turn on–time is 12 ms–15 ms.
Both times are independent of C1, C2, and V CC .
When the MC34119 is disabled, the voltages at FC1 and
FC2 do not change as they are powered from V CC . The
outputs, V O1 and V O2 , change to a high impedance condition,
removing the signal from the speaker. If signals from other
sources are to be applied to the outputs (while disabled), they
must be within the range of V CC and Ground.
Power Dissipation
Figures 8 to 10 indicate the device dissipation (within the
IC) for various combinations of V CC , R L , and load power. The
maximum power which can safely be dissipated within the
MC34119 is found from the following equation:
W
P D = (140
°
C – T A )/
q JA
where T A is the ambient temperature; and q JA is the package
thermal resistance (100
°
C/W for the standard DIP package,
C/W for the surface mount package.)
The power dissipated within the MC34119, in a given
application, is found from the following equation:
P D = (V CC x I CC ) + (I RMS x V CC ) – (R L x I RMS 2 )
°
where I CC is obtained from Figure 15; and I RMS is the RMS
current at the load; and R L is the load resistance.
Figures 8 to 10, along with Figures 11 to 13 (distortion
curves), and a peak working load current of ± 200 mA, define
the operating range for the MC34119. The operating range is
further defined in terms of allowable load power in Figure 14
for loads of 8.0
W
, 16
W
and 32
W
. The left (ascending) portion
4
MOTOROLA ANALOG IC DEVICE DATA
Chip Disable
The Chip Disable (Pin 1) can be used to power down the
IC to conserve power, or for muting, or both. When at a Logic
“0” (0 V to 0.8 V), the MC34119 is enabled for normal
operation. When Pin 1 is at a Logic “1” (2.0 V to V CC V), the
IC is disabled. If Pin 1 is open, that is equivalent to a Logic
“0,” although good design practice dictates that an input
should never be left open. Input impedance at Pin 1 is a
nominal 90 k
and 180
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MC34119
of each of the three curves is defined by the power level at
which 10% distortion occurs. The center flat portion of each
curve is defined by the maximum output current capability of
the MC34119. The right (descending) portion of each curve is
defined by the maximum internal power dissipation of the IC
at 25
°
Layout Considerations
Normally a snubber is not needed at the output of the
MC34119, unlike many other audio amplifiers. However, the
PC board layout, stray capacitances, and the manner in
which the speaker wires are configured, may dictate
otherwise. Generally, the speaker wires should be twisted
tightly, and not more than a few inches in length.
Figure 2. Amplifier #1 Open Loop Gain and Phase
Figure 3. Differential Gain versus Frequency
100
0
36
72
108
144
180
36
R f = 150 k, R i = 6.0 k
80
Phase
32
60
24
R f = 75 k, R i = 3.0 k
Gain
R f
0 . 1
40
16
Input
–
+ #1
V O1
V O2
R i
V O
20
8
#2
0
100
1.0 k
10 k
100 k
1.0 M
0
100
1.0 k
10 k 20 k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
5
C. At higher ambient temperatures, the maximum load
power must be reduced according to the above equations.
Operating the device beyond the current and junction
temperature limits will degrade long term reliability.
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