L4902A.PDF

L4902A

DUAL 5V REGULATOR WITH RESET AND DISABLE

. DOUBLE BATTERY OPERATING

. OUTPUT CURRENTS : I 01 = 300 mA

I 02 = 300 mA

PRELIMINARY DATA

. FIXED PRECISION OUTPUT VOLTAGE

5V ± 2 %

. RESET FUNCTION CONTROLLED BY INPUT

VOLTAGE AND OUTPUT 1 VOLTAGE

. RESET FUNCTION EXTERNALLY PRO-

GRAMMABLE TIMING

. RESET OUTPUT LEVEL RELATED TO OUT-

PUT 2

. OUTPUT 2 INTERNALLY SWITCHED WITH

ACTIVE DISCHARGING

. OUTPUT 2 DISABLE LOGICAL INPUT

. LOW LEAKAGE CURRENT, LESS THAN 1 m A

AT OUTPUT 1

. RESET OUTPUT NORMALLY HIGH

. INPUT OVERVOLTAGE PROTECTION UP TO

60V

. OUTPUT TRANSISTORS SOA PROTECTION

HEPTAWATT (Vertical)

. SHORT CIRCUIT AND THERMAL OVER-

LOAD PROTECTION

ORDERING NUMBER : L4902A

DESCRIPTION

The L4902A is a monolithic low drop dual 5V regu-

lator designed mainly for supplying microprocessor

systems.

Reset and data save functions and remote switch

on/off control can be realized.

PIN CONNECTION

July1993

1/9

L4902A

PIN FUNCTIONS

Name

Function

Input 1

Regulators Common Input

Timing

Capacitor

If Reg. 2 is switched-ON the delay capacitor is charged with a 5

A constant current. When

Reg. 2 is switched-OFF the delay capacitor is discharged.

Disable Input A high level (> V DT ) disable output Reg. 2.

GND

Common Ground

Reset Output When pin 2 reaches 5V the reset output is switched high.

Therefore t RD =C t ( 5V

A );t RD (ms) = C t (nF)

Output 2

5V – 300mA Regulator Output. Enabled if V o 1>V RT . DISABLE INPUT < V DT and V IN >V IT .If

Reg. 2 is switched-OFF the C 02 capacitor is discharged.

Output 1

5V – 300mA. Low leakage (in switch-OFF condition) output

BLOCK DIAGRAM

SCHEMATIC DIAGRAM

2/9

L4902A

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V IN

DC Input Voltage

Transient Input Overvoltage (t = 40ms)

I o

Output Current

Internally Limited

T stg ,T j Storage and Junction Temperature

– 40 to 150

THERMAL DATA

Symbol

Parameter

Value

Unit

R th j-case

Thermal Resistance Junction-case

Max

C/W

ELECTRICAL CHARACTERISTICS (V IN = 14.4V, T amb =25 o C unless otherwise specified))

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

V i

DC Operating Input Voltage

V 01

Output Voltage 1

R Load 1k

4.95

5.05

5.15

V 02 H

Output Voltage 2 HIGH

R Load 1k W

V 01 –0.1

V 01

V 02 L

Output Voltage 2 LOW

I 02 = – 5mA

0.1

I 01

Output Current 1 max.

V 01 = – 100mV

300

I L01

Leakage Output 1 Current

V IN =0,V 01

I 02

Output Current 2 max.

V 02 = – 100mV

300

V i01

Output 1 Dropout Voltage (*)

I 01 = 10mA

I 01 = 100mA

I 01 = 300mA

0.7

0.8

1.1

0.8

1.4

V IT

Input Threshold Voltage

V 01 + 1.2

6.4

V 01 + 1.7

V iTH

Input Threshold Voltage Hyst.

250

V 01

Line Regulation 1

7V < V IN < 24V, I 01 = 5mA

V 02

Line Regulation 2

7V < V IN < 24V, I 02 = 5mA

V 01

Load Regulation 1

5mA < I 01 < 300mA

V 02

Load Regulation 2

5mA < I 02 < 300mA

I Q

Quiescent Current

5mA

0< V IN < 13V

7V < V IN < 13V V 02 LOW

7V < V IN < 13V V 02 HIGH

4.5

2.7

1.6

6.5

4.5

3.5

V RT

Reset Threshold Voltage

V 02 – 0.15

4.9

V 02 – 0.05

V RTH

Reset Threshold Hysteresis

V RH

Reset Output Voltage HIGH

I R = 500

V 02 – 1

4.12

V 02

V RL

Reset Output Voltage LOW

I R = – 1mA

0.25

0.4

t RD

Reset Pulse Delay

C t = 10nF

t d

Timing Capacitor Discharge Time C t = 10nF

V DT

V 02 Disable Threshold Voltage

1.25

2.4

I D

V 02 Disable Input Current

V D 3

0.4V

– 150

–30

V 01

D T

Thermal Drift

– 20

T amb

125

0.3

– 0.8

mV/

V 02

Thermal Drift

– 20 ° C 3

T amb 3

125 ° C

0.3

– 0.8

mV/ ° C

SVR1

Supply Voltage Rejection

f = 100Hz V R = 0.5V

Io = 100mA

SVR2

Supply Voltage Rejection

* The dropout voltage is defined as the difference between the input and the output voltage when the output voltage is lowered of 25 mV under

constant output current condition.

Thermal Shut Down

150

3/9

I 01 =I 02 3

V D .

2.4V

T JSD

L4902A

TEST CIRCUIT

APPLICATION INFORMATION

In power supplies for m P systems it is necessary to

provide power continuously to avoid loss of infor-

mation in memories and in time of day clocks, or to

save data when the primary supply is removed. The

L4902A makes it very easy to supply such equip-

ments ; it provides two voltage regulators (both 5V

high precision) with common inputs plus a reset

output for the data save function and a Reg. 2

disable input.

grammable time T RD (timing capacitor).

V 02 and V R are switched together at low level when

one of the following conditions occurs :

- a high level ( V DT ) is applied on pin 3 ;

- an input overvoltage ;

- an overload on the output 1 (V 01 V RT );

- a switch off (V IN V IT -V ITH );

and they start again as before when the condition

is removed.

An overload on output 2 does not switch Reg. 2,

and does not influence Reg. 1.

The V 01 output features :

- 5V internal reference without voltage divider be-

tween the output and the error comparator

- very low drop series regulator element utilizing

current mirrors

permit high output impedance and then very low

leakage current even in power down condition.

CIRCUIT OPERATION (see Figure 1)

After switch on Reg. 1 saturates until V 01 rises to

the nominal value.

When the input reaches V IT and the output 1 is

higher than V RT the output 2 (V 02 ) switches on and

the reset output (V R ) also goes high after a pro-

Figure 1

4/9

L4902A

This output may therefore be used to supply circuits

continuously, such as volatile RAMs, allowing the

use of a back-up battery.

when the supply is interrupted.

The disable function can be used for remote on/off

control of circuits connected to the V 02 output.

The V 02 output can supply other non essential 5 V

circuits which may be powered down when the

system is inactive, or that must be powered down

to prevent uncorrect operation for supply voltages

below the minimum value.

Computer application.

The V 01 regulator(low consumption) supply perma-

nently a CMOS time of day clock and a CMOS

m computer chip with volatile memory. V 02 output,

supplying non-essential circuits, is turned OFF un-

der control of a m P unit.

The reset output can be used as a ”POWER DOWN

INTERRUPT”, permitting RAM access only in cor-

rect power conditions, or as a ”BACK-UP ENABLE”

to transfer data into in a NV SHADOW MEMORY

Figure 2

Figure 3 : P.C. Board Component Layout of Figure 2

5/9

APPLICATION SUGGESTIONS

Figure 2 illustrate how the L4902A’s disable input

may be used in a CMOS

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