400_800 Hardware Manual.PDF

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ATARI'HOME COMPUTER SYSTEM

HARDWARE MANUAL

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TABLE OF CONTENTS

INTRODUCTIoN.

, . . . .

. .... . .. .I. I

II.

DESCRTPTTON

... ,. .. ... .....,.,. ..r1.I

B. POKEY......,. .........rr.23

c. SERIALPORT........,.............,..,...II.25

D. INTERRUPT

...........

',...rr.

SYSTEM.....,,..............,,.1r.28

E, CONTRoLLERS,,

. ....... .rr.30

III.

RECTSTERS.

...... .. .. . ,. .. ... .. .....rr1.1

A. PAL..... ....

... ... .. ,IIt.l

.. .. ..... .....,.,. .III.1

c. Tv L1NECONTRoL.....

CONTRO1,..

.. ,.. .. .. .. ,.... .. ,11I.3

D. GMPIIICS CoNTROL.

. . . . . . . . . . . . , . . . . . . . . .III. 4

E. PLAYERS

ANDMISSILES,

... ,. .. . ,... ......II1.9

F. AlIDfO.

.. .. ,.. .IIL 12

G. KEYBOARD

and SPEAKXR.

....... .. .. ... ....I1I.15

.. .. ...,... .. .. . .. ,. .. ... ,.Irr.17

I. CONTROLLER

PORTS,......................III.

rv,

sAltpLE DISPLAY pRoeRAM...,...................IV.

HAIDIIARE RECISTER LISTS.

...,..,....v.

A. A'DRESS ORDER.

B. AI,PHABETICAL ORDER.

........,.....v.1

;.........,...,v,5

vr,

FlcuRES...,.

... ... ,..vr.t

MAp........,.....................vr. 1

B. NTSC andPALDISPLAY..

...., ,. ... .... ... .VI.2

c. SCIIEMATICS.,.

,........vI.3

APPENDIX A: USE OF PLAYER/MISSII,E GRAPHICS

WITH BASIC

APPENDIX B: MlXlNG GRAPIIICS MODES

APPENDIX C: PINOUTS

0F HARDWARE.

HARDWARE

B. INTERRUPT

.... .. .

11. SERIAL PORT.

.. ,...

A. MEMoRY

INTRODUCTION

The ATARI (R) 800rM and ATARI 400rM Personal conputer systems

colrtaln a 6502 nlcroprocessor' 4 I/O chtps, operating systen ROI'I'expandable

R-Alt, and several MsI chlps for sddress decodlng and data bu8 bufferlrg.

Thls nernral ls prloarlly lntended to descrlbe the 4llo chtps tn sufficent

detall to a11ow experlenced plograd&exs to create assembly tanguage Prograrns'

such as vldeo ganes. A11 four Inpul/Ortp\rt chips are controlled by the

rnlcroprocessor by nrltlng dlrectly lnto thell reglsters $hlch are decoded

to exlst ln Elcroprocessol nenory space Just as RAMdoes. These l/o chtps

can also be interrogated by the nlcroprocessor by leadlng slrdlar reglsters'

!,lany reglsters are wllte only and cannot be read after they are

wrltten. In aone ceses, reading fron the same addless glves the value

contalned ln 4 separate read only reglster. Sone wrlte only reglsters are

gtrobes. No data blts are deeded ln thls case slnce lhe presence of the

address on the bus ls \rhat trtggers the requested actlon.

The usual

conventlon 1s to use the STA (Store Accufillator) hstructlon for such

reglsters. For exanple, STA WSYNC perforrns the ltait for Sync functlon'

STX (Store x) or STY (store Y) vould ltork lust as weL1. In BASIC' a P0KE

could be used (the data could be anythlng). Readlng a reglster ls accoDp-

115hed by using eny of the load instrrcllons (LDA' LDX etc'). Ifl BASIC

a PEEK would be used. When lhe hardltare register naEes are deflned 1n an

equate llst' the proglaxmer can refer to the registers by name ralher than

uslflg the addresses dtreclly.

\:,-

I/O functlons are perfolrned by lthtch of lhe 4 chlps' however lt

does help ln learnlng these functlofls.

It ls rea1ly not rreceasary fot the plograffner to kno{ $hlch

Thls nanual should be used ln conluncllon rlth the Operatlng

Systen (oS) Manual, a 6502 prograoning narNal, and the

4343!]!qgl.g9g

Baslc Ref erellce I'I4tuaI.

CHIP T{AME

fUNCTION

ANTIC

DMA(Dlrect llenory Access) control

NUl (Non-Maskab 1e lnterlupt) control

Vertical and Horlzontal flne scrolllng

I-lght Pen Posltlon reglsters

Vertlcal l1ne counter

WSYNC

(ltatl for hortzonlal sync)

CTIA

Prlorlty control (display of overlapplag oblects)

Color-Lumlnance control (colors alrd brlghtness asslgned

to all oblects lttcludlng DMAobjects fron ANTIC)

?LAYER-MISSIIE obJects (4 players and 4 ldsstles)

cre^h{ r a raoi.rarc

Slze control

l{orlzontal posltlon control

Col11slon detectlon beBteen all objects

S{ltches and lriggers (rnlscellaneous 1/0 functions)

CII1P NAI,IE

FI]NCTION

POKEY

Keyboard scan and conlrol

Ser1a1 com.lnicatlons port (bidtrectlonal)

Pot scan (digitlzes posltion of 8 tndependelt pots)

Audlo generatlon (4 chanllels)

Tlners

IRQ (na6kable inlerrupt) control fron pertpherals

Randon {runber generator

PIA

Controller (Joysllck) lacks read ot write

Peripheral control and lnterrupt lines

IRQ (naskable) lnterrupt control from perirherats

Sectlon II descrtbes rhe hardware in sone deratl, lncludlng the

varlous graphics nodes. Sectlon III lists the hardrrare resisters orle a! a

tlne, describing whar each bit ts used for. It 1s organtzea by functional

groups (lnterruprs, graphlcs, audio, etc.). Section IV contatns a sanple

display plogtafi. Section V conlalns various flgures and block dtagrans of

the system. Sectlons VI and VII 11s! the hard\rare regtsters ln adilress

order and alphabetical order, Sectlon VII includes hex and decfidal

addresses, the OS shadon registers and the page ftrnbers i,,here nore infor_

nation can be found.

r,2

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