0799j(2).pdf

(209 KB) Pobierz
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
,1758’(5 ’(7(55(17 E\ %$57 75(3$.
the lamp being controlled. To
allow this, it samples the light
level only when the lamp being
switched is off. When the lamp
is on, the brightness level is ig-
nored so that feedback cannot
occur.
As the light level falls, the
circuit begins switching the
lights on and off at predeter-
mined intervals and, when in
the off state and the light level
has increased above a set level,
this action stops and the lights
remain switched off.
Is there anyone at home?
again, and so on. The effect is
likely to be far from realistic,
although the would-be intruder
may be led to think that there is
a disco party going on inside!
However, the device de-
scribed here has been designed
in such a way that it can be
plugged into any convenient
wall socket and the lamp
plugged or connected to it with-
out regard as to which way the
sensor is facing or the power of
$
At night, an intruder alarm
bell box may not be noticed and a
would-be intruder might attempt a
break in if the house appears un-
occupied. However, a light burn-
ing in an upstairs room is a good
deterrent and it is quite a simple
matter to build a light sensitive
switch to switch the lights on au-
tomatically when it gets dark.
The deterrent effect can be
made even greater by automati-
cally switching the lights on and
off every so often, so that it ap-
pears that there is somebody
there to do the switching.
Obviously too rapid an on-off
switching cycle would be unrealis-
tic and a period of a few minutes
would seem ideal. Since the light
being on would be more of a de-
terrent than if the potential in-
truder happened to come along
while the light was off, the circuit
should keep the lights on for
longer than the period for which
they are switched off.
2 3
SCHMITT NAND
The circuit is based on a
quad 2-input Schmitt trigger
NAND gate. To understand how
the circuit works, it is important,
therefore, to know what a
Schmitt NAND gate does.
The truth table for a 2-input
NAND gate is shown in Fig.1.
When both inputs are high, the
output will be low, but if either
or both of the inputs go low, the
%
$
% 2 3
Fig.1. NAND gate and truth
table.
,1387
,1387
9 CC
9 CC
DISCO LIGHTS
Building a light sensitive
switch is easy enough, but setting
one up to switch on the lights in
the same room is not quite so
simple. Great care must be taken
to place the sensor in a position
where it will sense the external
light level but not respond to the
light being switched on in the
room.
Failure to ensure this will re-
sult in a feedback effect with the
light switching on when it gets
dark, resulting in it being light
thus causing the light to switch off
833(5
7+5(6+2/’
833(5
7+5(6+2/’
,1’(7(50,1$7(
5(*,21
/2:(5
7+5(6+2/’
/2:(5
7+5(6+2/’
D
E
287387
287387
9 CC
26&,//$7,216
9 CC
Fig.2. Response of (a) “ordinary” and (b) Schmitt trigger gates
to slowly rising and falling input levels.
Copyright © 1999 Wimborne Publishing Ltd and
Maxfield & Montrose Interactive Inc
EPE Online, July 1999 - www.epemag.com - 686
883762781.176.png 883762781.187.png 883762781.198.png 883762781.208.png 883762781.001.png 883762781.012.png 883762781.023.png 883762781.034.png 883762781.045.png 883762781.056.png 883762781.067.png 883762781.078.png 883762781.089.png 883762781.100.png 883762781.111.png 883762781.122.png 883762781.133.png 883762781.140.png 883762781.141.png 883762781.142.png 883762781.143.png 883762781.144.png 883762781.145.png 883762781.146.png 883762781.147.png 883762781.148.png 883762781.149.png 883762781.150.png 883762781.151.png 883762781.152.png 883762781.153.png 883762781.154.png 883762781.155.png 883762781.156.png 883762781.157.png 883762781.158.png 883762781.159.png 883762781.160.png 883762781.161.png 883762781.162.png 883762781.163.png
 
&RQVWUXFWLRQDO 3URMHFW
middle of the indeterminate re-
gion) will cause the output to
switch between states giving
rise to the output waveform
shown in Fig.2a.
Once the input level is
above this indeterminate region,
it will now be considered to be
at a logic 1 level, and the output
will settle into its low state as
determined by the NAND gate’s
inversion function.
A similar action will happen
with a falling input voltage. The
indeterminate region does not
normally cause problems in
well-designed digital circuits be-
cause the input voltages switch
so fast that the output has no
time to oscillate. It can be a
great problem, though, if slow or
poorly defined logic signals are
applied.
The waveform in Fig.2b
shows how a Schmitt trigger
gate responds to the same
slowly rising or falling input and
it can be seen that no oscillation
occurs. The circuit achieves this
by having two well-defined input
thresholds and no indeterminate
region.
As the input voltage rises,
nothing happens until the upper
threshold is reached whereupon
the output switches to a low level.
Any small amount of noise on the
input is ignored and the circuit will
remain in this state until the input
has fallen below the lower thresh-
old, when the output will switch
high.
output will go high.
A Schmitt trigger NAND
gate differs from an “ordinary”
NAND gate in the way it re-
sponds to input signals, as illus-
trated in Fig.2. Assuming that
one input of the NAND gate is
connected to the positive rail
(logic high) and a slowly rising
ramp voltage is applied to the
other, the ordinary NAND gate
output will be high while the in-
put is below the lower logic
threshold.
For most CMOS gates, the
lower logic threshold below
which a logic 0 value is guaran-
teed by the manufacturer lies at
about one-third of the supply
voltage. Similarly, the guaran-
teed logic 1 condition lies above
about two-thirds of the supply
voltage. The region between the
two levels is considered indeter-
minate, in that neither logic
level can be guaranteed.
When the input voltage
level enters the indeterminate
region, the circuit begins to be-
have like a very high gain am-
plifier so that any noise super-
imposed on the input
(particularly when it is near the
SCHMITT OSCILLA-
TOR
Not only is this characteristic
extremely useful in this intruder
deterrent application, where the
voltage from the sensor will in-
evitably change slowly as dark-
ness falls or day breaks, but it
also allows the construction of
simple oscillators, as shown in
Fig.3.
When the circuit in Fig.3 is
switched on, the capacitor C will
be discharged so the input volt-
age will be low, resulting in the
output being high. Current will
now flow via resistor R and the
capacitor voltage will rise expo-
nentially until the upper threshold
is reached.
At this point, the output will
switch low, causing the capacitor
to discharge exponentially via re-
sistor R until the lower threshold
is reached, when the output will
go high again, and so on.
The output will be approxi-
mately a square wave (except for
the initial cycle) because the RC
time constant will be the same
whether the capacitor is charging
or discharging. This can be easily
modified, however, by connecting
a diode in series with another re-
sistor across resistor R as shown
dotted in Fig.3.
Depending on the direction of
the diode, this will effectively re-
duce either the charging or dis-
charging resistance, causing a
corresponding change in the
mark space ratio of the output
waveform. Alternatively, a resis-
,1387
9 CC
9 CC
&$3$&,725 92/7$*(
833(5
7+5(6+2/’
287387
/2:(5
7+5(6+2/’
5
287387
DN
9 CC
&
9
287387 92/7$*(
Fig.3. Schmitt trigger oscillator and its waveforms.
Copyright © 1999 Wimborne Publishing Ltd and
Maxfield & Montrose Interactive Inc
EPE Online, July 1999 - www.epemag.com - 687
883762781.164.png 883762781.165.png 883762781.166.png 883762781.167.png 883762781.168.png 883762781.169.png 883762781.170.png 883762781.171.png 883762781.172.png 883762781.173.png 883762781.174.png 883762781.175.png 883762781.177.png 883762781.178.png 883762781.179.png 883762781.180.png 883762781.181.png 883762781.182.png 883762781.183.png 883762781.184.png 883762781.185.png 883762781.186.png 883762781.188.png 883762781.189.png 883762781.190.png 883762781.191.png 883762781.192.png 883762781.193.png 883762781.194.png 883762781.195.png 883762781.196.png 883762781.197.png 883762781.199.png 883762781.200.png 883762781.201.png
 
&RQVWUXFWLRQDO 3URMHFW
7%
1
/3
9 D F
: :
&
Q
9 D F
5
0
7%
/ 2
9 D F
0$,16
07
&65
7,&
5
N
6
J
07
5
N
)6
$
7%
/
95
N
6(( 7(;7
5
W
75
%3 %
$
F
D
,& D
,& E
N
,& F
75
%&
H
H
N
9
P:
E
&
m
D
F
D
5
N
5
0
1
,& G
N
5
0
1
5
N
1 &
D
N
&
m
&
Q
1
DN
Fig.4. Complete circuit diagram for the Intruder Deterrent.
tor in parallel with a diode
placed in series with resistor R
would achieve the same result.
The circuit of Fig.3 is shown
with one input tied to the posi-
tive rail, but the gate still retains
its NAND characteristics. By
connecting the spare input to
0V, the output will switch high
and oscillation will stop. This
input can, therefore, be used to
switch the oscillator on or off if
required.
gate is high) will be shorter than
the discharging period so that the
output will be low for longer than
it is high. As this oscillator con-
trols the time for which the light is
switched on and off, the compo-
nents have been chosen to give a
“lights on” period of around 540
seconds and a “lights off” period
of about 100 seconds.
The output of this oscillator is
fed to IC1b, which simply inverts
the oscillator output. The output
of this is in turn connected to an-
other oscillator, based around
IC1c, C2, R4, R5 and D2.
In this oscillator, the values of
the capacitor and resistors are
much lower than with IC1a so that
the circuit oscillates at a much
higher frequency, of about
2‹5kHz. This gate oscillates when
the output of IC1b is high and D2,
R5 ensure that the transistor TR1
is switched on for only a short pe-
riod (around 30ms) while remain-
ing off for most of the cycle
(about 400ms).
This is done to reduce the
average current drawn by the
circuit and enable a simple ca-
pacitive dropper to be used in
the mains-derived power sup-
ply. Transistor TR1 is used to
trigger the triac CSR1, which in
turn switches the light on.
From this it should be clear
that the lights are only switched
on when the control input of
IC1c is high, because, when this
input is low, the gate’s output
will be forced high causing TR1
(a pnp device) and the triac to
switch off.
With the control input low
and the lights off, the potential
divider formed by R1, VR1 and
phototransistor TR2 is effec-
tively connected across the sup-
ply rails and comes into play. In
high light levels, TR2 will con-
duct and if the light level sensed
by TR2 is such that the voltage
at point A falls below the lower
threshold of IC1a, this oscillator
will be disabled and its output
will stay high, causing IC1b out-
CIRCUIT DETAILS
The operation of the In-
truder Deterrent circuit shown in
Fig.4 can now be described. As-
suming for the moment that the
point marked “A” in the circuit is
high, it will be seen that the out-
put of IC1a will oscillate at a
rate determined by C1, R2, R3
and D1.
Because of the orientation
of diode D1, the charging period
(during which the output of this
Copyright © 1999 Wimborne Publishing Ltd and
Maxfield & Montrose Interactive Inc
EPE Online, July 1999 - www.epemag.com - 688
883762781.202.png 883762781.203.png 883762781.204.png 883762781.205.png 883762781.206.png 883762781.207.png 883762781.209.png 883762781.210.png 883762781.211.png 883762781.212.png 883762781.213.png 883762781.214.png 883762781.215.png 883762781.216.png 883762781.217.png 883762781.218.png 883762781.002.png 883762781.003.png 883762781.004.png 883762781.005.png 883762781.006.png 883762781.007.png 883762781.008.png 883762781.009.png 883762781.010.png 883762781.011.png 883762781.013.png 883762781.014.png 883762781.015.png 883762781.016.png 883762781.017.png 883762781.018.png 883762781.019.png 883762781.020.png 883762781.021.png 883762781.022.png 883762781.024.png 883762781.025.png 883762781.026.png 883762781.027.png 883762781.028.png 883762781.029.png 883762781.030.png 883762781.031.png 883762781.032.png 883762781.033.png 883762781.035.png 883762781.036.png 883762781.037.png 883762781.038.png 883762781.039.png 883762781.040.png 883762781.041.png 883762781.042.png 883762781.043.png 883762781.044.png 883762781.046.png 883762781.047.png 883762781.048.png 883762781.049.png 883762781.050.png 883762781.051.png 883762781.052.png 883762781.053.png 883762781.054.png 883762781.055.png 883762781.057.png 883762781.058.png 883762781.059.png 883762781.060.png 883762781.061.png 883762781.062.png 883762781.063.png 883762781.064.png 883762781.065.png 883762781.066.png 883762781.068.png 883762781.069.png 883762781.070.png 883762781.071.png 883762781.072.png 883762781.073.png 883762781.074.png 883762781.075.png 883762781.076.png 883762781.077.png 883762781.079.png 883762781.080.png 883762781.081.png 883762781.082.png 883762781.083.png 883762781.084.png 883762781.085.png 883762781.086.png 883762781.087.png 883762781.088.png 883762781.090.png 883762781.091.png 883762781.092.png 883762781.093.png 883762781.094.png 883762781.095.png 883762781.096.png 883762781.097.png 883762781.098.png 883762781.099.png 883762781.101.png 883762781.102.png 883762781.103.png 883762781.104.png 883762781.105.png 883762781.106.png 883762781.107.png 883762781.108.png 883762781.109.png 883762781.110.png 883762781.112.png 883762781.113.png 883762781.114.png 883762781.115.png 883762781.116.png 883762781.117.png 883762781.118.png 883762781.119.png 883762781.120.png 883762781.121.png 883762781.123.png 883762781.124.png 883762781.125.png 883762781.126.png 883762781.127.png 883762781.128.png 883762781.129.png 883762781.130.png 883762781.131.png 883762781.132.png 883762781.134.png 883762781.135.png
 
&RQVWUXFWLRQDO 3URMHFW
put to stay low ensuring that the
lights stay off.
As darkness falls, TR2 will
begin to switch off and the volt-
age at point A will rise. When
the upper threshold is reached,
the output of IC1a will go low,
causing the output of IC1b to go
high, thus switching the lights
on. (Note, of course, that capac-
itor C1 will have been charged
since the output of IC1a re-
mains high when it is disabled
so that this input will also be
high.)
Both ends of the potential
divider formed by R1, VR1 and
TR2 will now be high so point A
will also be high, irrespective of
the light level being sensed by
TR2. Only when the lights
switch off again at the end of
the cycle (when IC1a output
goes high) will the ambient light
level be sampled again, ensur-
ing that the lights being
switched are ignored.
and potentially lethal voltages
are not stored by the capacitor.
The LED D5 is included to
show when the triac is being
triggered, to assist in setting up
the circuit if no load is con-
nected.
An on/off switch may be
considered an unnecessary lux-
ury, as there will normally be
one fitted to the socket into
which the device will be
plugged. However, an s.p.s.t.
switch connected across the
triac (as shown in Fig.4) could
be useful to select On or Auto-
matic mode allowing the unit to
be plugged permanently into a
socket and by-passed if not re-
quired, allowing the light to be
switched on and off manually.
The switch should, of course, be
rated for mains applications.
above resistors R7 and R8. A
socket should be used for IC1.
There is one wire link on the
board between IC1 and the ter-
minal block a short piece of
component lead trimmed from a
resistor will serve.
Take care to mount all po-
larity sensitive components
such as diodes, electrolytic ca-
pacitors and semiconductors the
right way around. Transistor
TR1 may be almost any small
signal pnp type, such as a
BC212, BC327, 2N3702,
ZTX500 etc., but make sure that
the type chosen has the same
lead configuration as the device
specified (see Fig.5).
Phototransistor TR2 is
housed in a clear 2-pin 5mm
LED-type package with the base
connection being omitted. The
collector connection is the one
adjacent to the flat portion on
the rim of the package (as
shown in Fig.5).
Other phototransistors could
possibly be used, although this
has not been tried. The one
specified has the great advan-
tage of being cheap and easy to
mount in a panel as a standard
LED clip can be used. Although
it is shown mounted on the
PCB, it will probably be best
mounted in the side of the box
and connected to the PCB by
flying leads.
CONSTRUCTION
Because this circuit is
mains powered, it is not suitable
for beginners. If you are in any
doubt about connecting it cor-
rectly, consult a qualified electri-
cian.
The circuit is assembled on
a small printed circuit board
(PCB), whose layout and track
details are shown in Fig.5. This
board is available from the EPE
www.epemag.com
The PCB should be assem-
bled and checked carefully be-
fore making any connections to
the mains supply any mis-
takes could easily result in the
instant destruction of your work
and many of the components.
Construction should follow
normal practice, with low profile
components such as resistors
and diodes being mounted first
before progressing to the taller
devices such as capacitors.
Note that capacitor C4 rests
POWER SUPPLY
Power for the circuit is de-
rived from the normal house-
hold mains supply. (Note that
this article assumes a UK mains
supply, Ed.) Capacitor C4 and
Zener diode D4 drop the mains
voltage to around 8V with D3
rectifying and C3 smoothing the
output to give a DC supply of
just over 7V. This value will
vary depending on the current
drawn by the circuit, especially
when the triac is switched on,
but will have no effect on the
circuit operation.
Resistor R7 is included to
protect the Zener diode from the
high current, which could flow
when the circuit is first con-
nected to the mains with capaci-
tor C4 discharged. Resistor R8
serves to discharge C4 when
the circuit is disconnected from
the mains, ensuring that high
POWER RATINGS
Two components worthy of
special note are capacitor C4
and triac CSR1. Both of these
must be rated for mains opera-
tion, which means that C4
should have a voltage rating of
250V AC and CSR1 a rating of
at least 400V AC.
Note that on many capaci-
tors the voltage ratings usually
Copyright © 1999 Wimborne Publishing Ltd and
Maxfield & Montrose Interactive Inc
EPE Online, July 1999 - www.epemag.com - 689
883762781.136.png 883762781.137.png
&RQVWUXFWLRQDO 3URMHFW
vice will trigger in all situations.
The TIC206D specified has a
maximum trigger current re-
quirement of 5mA and any re-
placement should also have this
value or less.
In practice, this will mean
that devices with a load current
rating of 3A or less will be suit-
able, limiting the maximum load
power to 750 watts in the case
of the device specified.
Even this can only be
achieved with the device
mounted on a suitably large
heatsink and a more realistic
maximum power of 200W to
300W should be respected if no
heatsink is fitted. This should in
any case be more than suffi-
cient for the intended applica-
tion where a 40W or 60W lamp
will probably be used. No provi-
sion for a heatsink has been
made on the PCB or in the sug-
gested plug-box.
times should be measured in
minutes rather than seconds,
and the Off time should be rela-
tively short compared to the On
time.
The nature of the circuit en-
sures that the On time will al-
ways be longer than the Off
time (provided diode D1 is not
reversed) and with the compo-
nent values specified these will
be around nine minutes on and
almost two minutes off. Longer
times may be achieved by mak-
ing C1 and/or R2 and R3 larger.
There is little advantage in
making these times variable
but, again, panel-mounted po-
tentiometers (with suitable se-
ries resistors) could be used if
required.
The relatively long time
constants can make testing the
circuit a bit of a chore and it is
therefore recommended that,
initially, the circuit is built with
C1 equal to (say) 4‹7mF and
once circuit operation is proved
the larger specified value can
be substituted.
COMPONENTS
Resistors
R1 10k
R2, R8 1M (2 off)
R3 4M7
R4 22k
R5, R7 1k (2 off)
R6 470 ohms
All 0.25W 5% carbon film
Potentiometer
VR1 470k min. horizontal preset
Capacitors
C1 100u radial electrolytic, 16V
C2 100n ceramic plate, 63V
C3 470u radial electrolytic, 16V
C4 100n 250V AC Class X
Semiconductors
D1 to D3 1N4148 signal diode
D4 8V2 400mW Zener diode
D5 red LED
TR1 BC558 pnp transistor
TR2 BP103B phototransistor
CSR1 TIC206D sensitive-gate
triac, 400V
IC1 4093 quad 2-input Schmitt
NAND gate
Miscellaneous
S1 s.p.s.t. insulated switch, mains
rated (see text);
Printed circuit board available
7000235 ( www.epemag.com );
LED clip; 3-way terminal block;
14-pin DIL socket; plug-box with
integral mains outlet socket, in-line
fuseholder and fuse (see text);
mains-rated connecting wire;
solder, etc.
VARIABLE TIMING
Variable resistor VR1 is
specified as a preset compo-
nent and determines the ambi-
ent light level at which the cir-
cuit will begin to switch. There
should not be any need to keep
adjusting this, especially if the
unit is always mounted in the
same location, but it can be re-
placed by a panel mounted po-
tentiometer of the same value if
required.
If you decide to do this,
choose a device with a plastic
spindle and connect it to the
PCB with flying leads. As men-
tioned earlier, the On time is
determined by capacitor C1 to-
gether with R2 and R3 while the
Off time depends on the value
of resistor R2.
As these times are not criti-
cal, other values for these com-
ponents could also be used, al-
though for realism the resulting
FIRST TESTS
With safety in mind, it is
probably best to temporarily by-
pass capacitor C4 with a wire
link and power the circuit from a
9V battery or a low voltage
power supply by connecting the
positive to terminal L and the
negative to N. This part of the
testing should be done before
mounting the unit in its plug-
box.
No load should be con-
nected to the triac as the LED
can be used to indicate the out-
put status.
This approach will enable
the circuit to be checked and set
up at a low safe voltage before
it is connected to the mains sup-
ply for a final check. Remember
to remove the C4 bypass link
See also the
SHOP TALK Page!
Approx. Cost
Guidance Only
(Excluding Case)
$16
refer to DC values and the
breakdown voltage on AC sup-
plies may be very much lower.
A Class X device rated for con-
necting directly across the
mains supply must be used for
C4.
Because of the limited cur-
rent which this kind of power
supply circuit can provide, it is
important to use a sensitive-
gate triac to ensure that the de-
Copyright © 1999 Wimborne Publishing Ltd and
Maxfield & Montrose Interactive Inc
EPE Online, July 1999 - www.epemag.com - 690
883762781.138.png 883762781.139.png
Zgłoś jeśli naruszono regulamin