op176.pdf
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OP176* Bipolar/JFET, Audio Operational Amplifier
a
Bipolar/JFET,
Audio Operational Amplifier
OP176*
FEATURES
Low Noise: 6 nV/
Ö
Hz
High Slew Rate: 25 V/
PIN CONNECTIONS
s
Wide Bandwidth: 10 MHz
Low Supply Current: 2.5 mA
Low Offset Voltage: 1 mV
Unity Gain Stable
SO-8 Package
m
8-Lead Narrow-Body SO
8-Lead Epoxy DIP
(S Suffix)
(P Suffix)
NULL
–IN
+IN
V–
1
2
3
4
8
NC
V+
OUT
NULL
NULL
1
2
OP176
8
NC
OP176
7
–IN
+IN
V–
7
V+
OUT
NULL
6
6
3
4
APPLICATIONS
Line Driver
Active Filters
Fast Amplifiers
Integrators
5
5
OP-482
V. This allows the OP176 to be used in many dc coupled
or summing applications without the need for special selections
or the added noise of additional offset adjustment circuitry.
The output is capable of driving 600
m
GENERAL DESCRIPTION
The OP176 is a low noise, high output drive op amp that
features the Butler Amplifier front-end. This new front-end
design combines both bipolar and JFET transistors to attain
amplifiers with the accuracy and low noise performance of
bipolar transistors, and the speed and sound quality of JFETs.
Total Harmonic Distortion plus Noise equals previous audio
amplifiers, but at much lower supply currents.
Improved dc performance is also provided with bias and offset
currents greatly reduced over purely bipolar designs. Input
offset voltage is guaranteed at 1 mV and is typically less than
loads to 10 V rms while
maintaining low distortion. THD + Noise at 3 V rms is a low
0.0006%.
The OP176 is specified over the extended industrial (–40
W
°
C to
C) temperature range. OP176s are available in both plastic
DIP and SO-8 packages. SO-8 packages are available in 2500
piece reels. Many audio amplifiers are not offered in SO-8
surface mount packages for a variety of reasons, however, the
OP176 was designed so that it would offer full performance in
surface mount packaging.
°
*Protected by U.S. Patent No. 5101126.
7
RB4
RB5
RB7
RB6
RB2
RB3
QB4
QB5
QB6
QB7
CB1
R4
QB3
J1
J2
Q10
Q1
Z2
Q2
QS1
2
3
Q9
RS1
R5
6
JB1
CCB
RS2
CC2
QB2
Q6
Q5
QS2
Q4
QS3
Q3
Q8
Q11
RB1
CF
R3
R1L
R1P1
R2P1
R2L
Q7
QB8
QB9
QB1
Z1
CC1
R1A
R1P2
R1S
R2S
R2P2
R2A
1
5
4
Simplified Schematic
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
200
+85
OP176–SPECIFICATIONS
(@ V
S
=
±
15.0 V, T
A
= +25
°
C unless otherwise noted)
Symbol
Conditions
Min
Typ
Max
Units
INPUT CHARACTERISTICS
Offset Voltage
V
OS
1
mV
Offset Voltage
V
OS
–40°C £ T
A
£ +85°C
1.25
mV
Input Bias Current
I
B
V
CM
= 0 V
350
nA
V
CM
= 0 V, –40°C £ T
A
£ +85°C
400
nA
Input Offset Current
I
OS
V
CM
= 0 V
± 50
nA
V
CM
= 0 V, –40°C £ T
A
£ +85°C
± 100
nA
Input Voltage Range
V
CM
–10.5
+10.5
V
Common-Mode Rejection
CMRR
V
CM
= ± 10.5 V,
–40°C £ T
A
£ +85°C
80
106
dB
Large Signal Voltage Gain
A
VO
R
L
= 2 kW
250
V/mV
R
L
= 2 kW, –40°C £ T
A
£ +85°C
175
V/mV
R
L
= 600 W
200
V/mV
Offset Voltage Drift
DV
OS
/DT
5
mV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing
V
O
R
L
= 2 kW, –40°C £ T
A
£ +85°C
–13.5
+13.5
V
R
L
= 600 W, V
S
= ± 18 V
–14.8
+14.8
V
Output Short Circuit Current
I
SC
± 25
± 50
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= ± 4.5 V to ± 18 V
86
108
dB
–40°C £ T
A
£ +85°C
80
dB
Supply Current
I
SY
V
S
= ± 4.5 V to ± 18 V, V
O
= 0 V,
R
L
= ¥, –40°C £ T
A
£ +85°C
2.5
mA
Supply Current
I
SY
V
S
= ± 22 V, V
O
= 0 V, R
L
= ¥,
–40°C £ T
A
£ +85°C
2.75
mA
Supply Voltage Range
V
S
± 4.5
± 22
V
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
W
15
25
V/
m
s
Gain Bandwidth Product
GBP
10
MHz
AUDIO PERFORMANCE
THD + Noise
V
IN
= 3 V rms,
R
L
= 2 k
W
, f = 1 kHz
0.001
%
Voltage Noise Density
e
n
f = 1 kHz
6
nV/
Ö
Hz
Current Noise Density
i
n
f = 1 kHz
0.5
pA/
Ö
Hz
Specifications subject to change without notice.
–2–
REV. 0
ELECTRICAL CHARACTERISTICS
Parameter
OP176
WAFER TEST LIMITS
(@ V
S
=
±
15.0 V, T
A
= +25
°
C unless otherwise noted)
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
V
OS
1
mV max
Input Bias Current
I
B
V
CM
= 0 V
350
nA max
Input Offset Current
I
OS
V
CM
= 0 V
±
50
nA max
Input Voltage Range
1
V
CM
±
10.5
V min
Common-Mode Rejection
CMRR
V
CM
=
±
10.5 V
80
dB min
Power Supply Rejection Ratio
PSRR
V =
±
4.5 V to
±
18 V
86
dB min
Large Signal Voltage Gain
A
VO
R
L
= 2 k
W
250
V/mV min
Output Voltage Range
V
O
R
L
= 2 k
W
13.5
V min
V
S
=
±
18.0 V, R
L
= 600
W
14.8
V min
Supply Current
I
SY
V
S
=
±
22.0 V, V
O
= 0 V, R
L
=
¥
2.75
mA max
V
S
=
±
4.5 V to
±
18 V,
2.5
mA max
V
O
= 0 V, R
L
=
¥
NOTES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
1
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . ± 7.5 V
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP176G . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
DICE CHARACTERISTICS
V
+
OUT
NULL
V
–
Package Type
q
JA
3
q
JC
Units
NULL
–IN
+IN
8-Pin Plastic DIP (P)
103
43
°C/W
8-Pin SOIC (S)
158
43
°C/W
OP176 Die Size 0.069
´
0.067 Inch, 4,623 Sq. Mils.
Substrate (Die Backside) Is Connected to V–.
Transistor Count, 26.
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
For input voltages greater than
±
7.5 V limit input current to less than 5 mA.
q
JA
is specified for the worst case conditions, i.e.,
q
JA
is specified for device in socket
for P-DIP packages;
q
JA
is specified for device soldered in circuit board for SOIC
package.
ORDERING GUIDE
Model
Temperature Range Package Description
Package Option
OP176GP
–40°C to +85°C
8-Pin Plastic DIP
N-8
OP176GS
–40°C to +85°C
8-Pin SOIC
SO-8
OP176GSR –40°C to +85°C
SO-8 Reel, 2500 Pieces
OP176GBC +25°C
DICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP176 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–3–
Guaranteed by CMR test.
NOTES
1
2
3
OP176–Typical Characteristics
120
30
±
V
S
=
±
15V
±
V
S
=
±
15V
100
25
AAAAAAAA
£
–40°C
£
T
A
£
+85°C
W
T
A
= +25°C
R
L
= 2k
AAAAAAAA
80
20
AAAAAAAA
BASED ON 300 OP AMPS
60
15
AAAAAAAA
40
10
AAAAAAAA
20
5
0
AAAAAAAA
0
0
1
2
3
4
5
6
7
8
1k
10k
100k
1M
10M
m
t
C
V
OS
–
m
V/°C
FREQUENCY – Hz
Figure 1. Input Offset Voltage Drift Distribution @
±
15 V
Figure 4. Maximum Output Swing vs. Frequency
16
16
V
S
= ±15V
T
A
= +25°C
W
V
S
=
±
18V, +V
OM
, R
L
= 600
W
14
W
V
S
=
±
18V,
½
–V
OM
½
, R
L
= 600
W
POSITIVE SWING
15
12
10
NEGATIVE SWING
W
V
S
=
±
15V, +V
OM
, R
L
= 2k
W
8
14
W
V
S
=
±
15V,
½
–V
OM
½
, R
L
= 2k
W
6
13
W
V
S
=
±
15V, +V
OM
, R
L
= 600
W
4
W
V
S
=
±
15V,
½
–V
OM
½
, R
L
= 600
W
2
12
0
–50
–25
0
25
50
75
100
10
100
1k
10k
TEMPERATURE – °C
W
LOAD RESISTANCE –
W
Figure 2. Output Swing vs. Temperature
Figure 5. Maximum Output Swing vs. Load Resistance
300
2.50
250
±
V
S
=
±
15V
V
CM
= 0V
2.25
200
T
A
= +85°C
150
2.00
T
A
= +25°C
100
1.75
50
T
A
= –40°C
0
–50
–25
0
25
50
75
100
1.50
0
±
5
±
±
10
±
SUPPLY VOLTAGE – V
±
15
±
±
20
±
±
25
±
TEMPERATURE – °C
Figure 3. Input Bias Current vs. Temperature
Figure 6. Supply Current per Amplifier vs. Supply Voltage
–4–
REV. 0
OP176
80
120
70
±
V
S
=
±
15V
T
A
= +25°C
+PSRR
±
V
S
=
±
15V
100
SINK
60
50
SOURCE
80
40
60
–PSRR
30
40
20
10
20
0
0
–50
–25
0
25
50
75
100
100
1k
10k
100k
1M
TEMPERATURE – °C
FREQUENCY – Hz
Figure 7. Short Circuit Current vs. Temperature @
±
15 V
Figure 10. Power Supply Rejection vs. Frequency
120
2000
T
A
= +25°C
V
S
= ±15V
R
L
= >600
15V
±
V
O
=
±
10V
V
S
=
±
100
1750
80
W
1500
GAIN
60
W
–GAIN, R
L
= 2k
W
1250
40
90
PHASE
1000
+GAIN, R
L
= 2k
W
20
135
750
0
PHASE MARGIN = 60°
180
–GAIN, R
L
= 600
W
–20
225
500
–40
250
+GAIN, R
L
= 600
W
–60
0
1k
10k
100k
1M
10M
100M
–50
–25
0
25
50
75
100
FREQUENCY – Hz
TEMPERATURE – °C
Figure 8. Open-Loop Gain & Phase vs. Frequency
Figure 11. Open-Loop Gain vs. Temperature
50
40
40
T
A
= +25°C
V
S
= ±15V
T
A
= +25°C
V
S
= ±15V
30
30
20
A
V
= +100
10
20
0
–10
10
A
V
= +10
–20
A
V
= +1
–30
0
1k
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 9. Closed-Loop Gain vs. Frequency
Figure 12. Closed-Loop Output Impedance vs. Frequency
REV. 0
–5–
±
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